The latest
addition to our AT computer line of Lucent DSP32C boards
is also the most powerful and flexible. It can be
configured with only 6k bytes of on-chip RAM all the way
up to 3.5M bytes.
Host Interface
A 16-bit I/O mapped ISA interface can support programmed
I/O as well as DMA transfers. Jumpers are used to set the
boardÕs I/O address up to 0xFF0.
Interrupts
Either the host or data into the DSP's serial port can
interrupt the DSP. The DSP can interrupt the host using
IRQ2 through IRQ15, jumper selectable.
ID Register
To restrict the usage of proprietary software, a PAL can
be programmed with a security number that can be read by
the host. This will assure that the DSP code can only be
run on a registered board.
Memory
On-board static RAM consists of 512k byte custom SIMM
modules. Bank A (starting address: 0) can accommodate a
single module of zero wait-state SRAM while bank B
(starting address: 0x800000) can be populated with either
a single 512k memory module of zero wait-state SRAM or up
to six 512k byte modules for a maximum of 3M bytes of one
wait-state memory. Memory upgrades can easily be made in
the field by ordering SIMM512K modules.
Analog I/O
The expanded mezzanine area can accept any one of our
daughter cards and still occupy only a single AT slot. We
have added a 16-bit parallel port to the mezzanine board
area that can be read and written directly by the host.
This adds the ability to program setup conditions on the
daughter card. The endplate accommodates a subminiature
DB-15 for bit I/O, two RCA phono-jacks and an RJ-11
modular phone handset adaptor for analog signals.
Optionally, the board can be ordered with four
phono-jacks and no RJ-11 for use with the DBY3, dbY4, or
dbY5 stereo in/out cards.
Specifications
| Lucent WE DSP32C-R35 processor |
| 74/50 MHz clock - 37/25 MFLOPS |
| 6K bytes on-chip RAM |
| 512K zero wait-state SRAM |
| 512K zero wait-state SRAM |
| 4.5"H x 13.4"W full AT
slot |
| 16-bit I/O mapped |
| DMA data transfer supported |
| P/N Code |
Clock (MHz) |
SRAM Bank A |
SRAM Bank B |
| kBytes |
Wait-states |
MBytes |
Wait-states |
| A5A500 |
50 |
512 |
0 |
0 |
0 |
| A5C500 |
74 |
512 |
0 |
0 |
0 |
| A5A5D0 |
74 |
512 |
0 |
.5 |
0 |
| A5C5F1 |
74 |
512 |
0 |
1 |
1 |
| A5C5H1 |
74 |
512 |
0 |
1.5 |
1 |
| A5C5J1 |
74 |
512 |
0 |
2 |
1 |
| A5C5L1 |
74 |
512 |
0 |
2.5 |
1 |
| A5C5N1 |
74 |
512 |
0 |
3 |
1 |
A 50 MHz DSP can be specified by P/N A5A5 (followed by
bank B SRAM options) instead of A5C5.
V3PROTO
P/N: X4
This prototyping board has connectors to the DSP's serial
port as well as the additional 16-bit parallel port.
Appending an "X4" to the DSP board's part
number adds this prototype board.
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