Six Lucent 32-bit floating-point 80MHz DSPs provide a total of 240 MFLOPS
(120 MIPS) in this single-slot stackable mezzanine. Each processor has 512 bytes of
internal RAM and either 512kB or 2MB of local zero wait-state SRAM. Each processor can
read and write to the TDM bus passed through the stacking connector. Two LEDs for each DSP
(visible through the front panel) are under user software control.
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EmPack system DSP32C mezzanine module
There are two configurations of the Em32C:
Part # |
SRAM/DSP |
+5V |
EBL5 |
512kB |
3.2A |
EBL2 |
2MB |
4.4A |
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