The IMATM supports hardware-level filtering of
ATM cells based on Virtual Circuit and performs autonomous
AAL3/4 and AAL5 processing. AAL1 and AAL2 require assistance
from a processor attached to the PCI bus, such as a PM4700
module , PM5000 module, or the PM7000 module. We enabled the Receive
Utopia Interface (RUI) to allow receive data from the utopia
interface to be put on the TDM bus.
The IMATM transceiver is made of an HP optical
transmitter and receiver, both of which protrude through
the front panel of the 6U VME (V6M6 or V6M6 Hot Swap)
or 6U Compact PCI (C6M6) baseboard. They accommodate SC-type fiber
optic connectors and are intended for use with 1300nm
multimode fiber running at 155Mbps.
PHY and Timing Components
A PMC Sierra SUNI-Ultra chip provides PHY functions including optical
transceiver interface, clock recovery, SONET and ATM framing,
and UTOPIA interface. Timing components on the
module provide the ability to do one of the following:
lock the TDM clocking to the 8KHz SONET framing
generate the optical clocking based on the TDM 8KHz framing
allow the optical and TDM timing to operate independently
An IDT77252 ABRSAR chip provides ATM cell processing
functions. It transmits and receives ATM cells with the
PHY via a UTOPIA interface and interfaces to the baseboard via
its PCI interface.
SRAM attached to the SAR provides:
The IMATM has bus-mastering capabilities that gives the
SAR direct access to PCI memory to deposit and
retrieve cells and packets of data. This minimizes
the load on the associated processor and allows long bursts
of traffic at full OC-3 rate.
the ability to filter and direct ATM cells
based on the Virtual Circuit identified in each cell
buffering for cells in transit
a transmitter schedule table for managing
output cell streams
receive FIFO for incoming ATM traffic
The SAR handles all required details of segmentation and
reassembly for AAL3/4 and AAL5 packets. Other types of
traffic (e.g. AAL1 and AAL2) are treated as raw cells by
the SAR and are placed or taken from queues in PCI memory.
Required Support Processor
The IMATM requires another processor on the PCI bus,
such as the PM4700A,
to initialize the PHY and SAR, manage the flow of ATM
traffic and handle exception conditions.
CAC supplies a real-time Unix-like kernel for the PM4700A
with support for the IMATM.
Note that the kernel requires support from a CAC-supplied
server process in the VME host computer. This server is
currently supported on SunOS, Solaris and VxWorks for the PowerPC.
CAC has converted and tested the RTEMS operating system to support
the baseboard and modules for telephony applications.
OC-1, OC-3, STM-1,
1300nm multimode SC
|+5v power (A)
|Max per V6M6
A and C
|Max per C6M6
A and C
2.9 x 2.75