|
This mezzanine board enables the two DSP32Cs of the
SB32C2 board to communicate with each other through a
pair of FIFOs mapped into the DSPs' memory space. These
are byte wide FIFOs, 512 bytes long, and use the external
interrupt of the DSP to signal the presence of data.
MTBF: 1,741,000 hrs
| P/N code |
Description |
# DSPs |
Clock |
| S1A5 |
SB32C1/50 |
1 |
50MHz |
| S2A5 |
SB32C2/50 |
2 |
50MHz |
| S1B5 |
SB32C1/74 |
1 |
74MHz |
| S2B5 |
SB32C2/74 |
2 |
74MHz |
| P/N code |
Description |
Inferface |
Impedance |
| SBT1 |
SBT1 |
T1 |
100 ohm |
| SBE1 |
SBE1/120 |
E1 balanced |
120 ohm |
| SBE5 |
SBE1/50 |
E1 balanced |
50 ohm |
| SBE7 |
SBE1/75 |
E1 balanced |
75 ohm |
| SBEA |
SBE1/120 |
E1 unbalanced |
120 ohm |
| SBEE |
SBE1/50 |
E1 unbalanced |
50 ohm |
| SBEG |
SBE1/75 |
E1 unbalanced |
75 ohm |
| SBDD |
SBDD |
FIFO |
|
|
