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The IMSCSA uses a VLSI
Technology SC4000 chip to connect up to 128 inbound and
128 outbound timeslots between the SCSA bus and the
V6M6,
V6M6 hot-swap
baseboard with four serial
TDM buses.
A single channel HDLC controller on the IMSCSA
provides an interface to the SCSA Message Channel.
Message Channel data and SC4000 control information are
passed through the PCI bus. The IMSCSA must be installed
in site B of the V6M6 or V6M6HS to access the VME P2 connector.
For
the V6M6HS that
includes H.110 on the baseboard, this module will provide
an additional 128 inbound and 128 outbound timeslots.
Our software API provides functions to initialize the
SCSA and TDM subsystems, select the SCSA clock master and
make/break connections between TDM timeslots and SCSA
timeslots.
Specifications
| Product name |
IMSCSA
|
| Interface chip |
VLSI SC4000
|
| P/N code |
MPS1
|
| Timeslots |
128
|
| MTBF (kHr) |
1789
|
| +5v power (A) |
0.2
|
| Max per V6M6 or V6M6HS |
1
|
| V6M6 or V6M6HS site |
B only
|
| Size (inch) |
2.9x2.75
|
| 
