July 9, 2003

Overview

Version 0.3.1 is a beta release of the Channelization API for DPL3 and LightParser Boards. Not all of the functionality is implemented in this release.

The "Channelization API Reference Manual", "DPL3 Hardware Reference Manual" and "Light Parser Hardware Reference Manual" describe details of the currently supported and unsupported features in the API and hardware.

The following changes are introduced in this release:

• Fixed LightParser clock selection and detection problems.

• Support for additional parsing paths for LightParser.

• Reduced memory mapping in the device driver.

• Fixed Linux device driver installation for SMP kernels.

• Added uninstall capability to Makefiles.

• Changes in the API library.

• Changes to utility programs.

• Changes in the LightParser Spartan FPGA.

• Changes in the LightParser Virtex FPGA.

• Component versions for this release.

Note: This release includes new FPGA configurations for LightParser boards. Run the dplp_flashup program to update the FPGAs on the boards.

This release is intended for evaluation purposes and does not represent the intended final production release. Some aspects of the application program interface (API) are subject to change as the software development continues to meet design requirements and usability issues.

Fixed LightParser Clock Selection and Detection Problems

Seemingly intermittent system hangs had been occurring during the use of the dplp_init and dplp_portcfg programs. These turned out to be caused by a variety of issues having to do with selecting the board's reference clock and the detection of clock presence for transactions involving the Virtex FPGA.

The problems have been resolved with a combination of logic changes in FPGAs and software changes in the API library. The modifications involved are discussed in the following sections.

Support for Additional Parsing Paths for LightParser

The following two additional parser paths have been implemented and debugged in the Virtex FPGA and API functions. New demonstrations programs are provided to configure these paths.
• AU-4 -> 3*TUG-3 -> 3*E3 -> 48*E1
• 3*AU-3 -> 63*VC-12 -> 63*E1

The names of the parser configuration demonstration programs have been changed to convey more details of the paths they configure. The demo programs also have the ability to generate parser configuration scripts that may be edited and executed to experiment with various sequencer settings. See the Readme.demos file in the demo directory for details.

Reduced Memory Mapping in the Device Driver

The amount of I/O memory mapped into the device drivers has been reduced for both DPL3 and LightParser boards on both Solaris and Linux systems.

During initial software development the entire memory space of the boards was being mapped in to allow full access for testing. The device drivers currently require much smaller regions and, in some cases, the operating system was not allowing the full memory regions to be mapped.

Additional memory mapping reductions are planned for a future release.

Fixed Linux Device Driver Installation for SMP Kernels

The configuration script for the Linux device driver now correctly determines the name of the kernel source directory when checking for kernel header files.

In previous versions it neglected to remove "smp" from the Kernel name when generating the name of the source directory.

Added Uninstall Capability to Makefiles

The various Makefile for the software now support the make uninstall command. Performing an uninstall is not always necessary but is useful to ensure that old programs and other obsolete files are not left from previous versions.

Changes in the API Library

These changes to API library functions only affect software for LightParser.

Code using the power-down / recalibrate feature of the Optical and CMI clock and data recovery chips was removed from the cac_if_set_rx_mode function because it could cause temporary loss of clock that could subsequently cause the board to not respond to host access and hang the system.

The cac_if_set_refclk function is modified to set the locally generated clock as the reference prior to selecting the new clock source to avoid possible loss of the clock and subsequent system hang.

New special error codes (values set in the global errno variable) and corresponding error strings for the cac_strerror function are added to provide more specific error information for the LightParser port configuration functions.

A timing problem in the I2C functions was resolved with additional delay between I2C commands (in the cac_i2c_stop function). This resolved the problem writing data to the LightParser's EEROM on some systems.

The cac_virtex_rmw is modified to use the API-only functions for read-write-modify operations so that the device driver is not required to map in the LightParser's Virtex memory region. Note that the device driver still maps this region in this version to avoid possible conflicts during version transition.

New functions are added to the API for parser configuration to implement new parser paths. In addition, new functions, cac_parse_do_script and cac_parse_do_verify are provided for script generation and sequencer setup verification.

The API functions for accessing data from the SFP Optical module are modified to work properly.

Changes to Utility Programs

New documentation for the DPL3 and LightParser Utility programs is available on the distribution CD and the CAC website.

The dplp_init program is modified to check new status available from the Spartan FPGA to determine if the 39MHz and 77MHz clocks are present and avoid attempting accesses that require those clocks. Clearing the parser configuration is also added to dplp_init.

Both the dpl_init and dplp_init programs now require a command line argument specifying the name of the board to be initialized or the word all to initialize all DPL3 or LightParser boards in the system.

The dpl_flashup and dplp_flashup are modified to clear the board's INIT bit when new FPGA configurations are loaded to force the requirement that they be initialized before applications are run. They also have added error messages if there is an error updating version information in the EEROM and they are fixed to implement the quiet (-q) option.

The dplp_portcfg program has an added mode (0) for the port transmit (-t) option that allows for the Optical ports laser to be turned off without having to modify any other transmit port options.

The dplp_sfputil has been overhauled to remove unnecessary commands and options and to remove unnecessary information from the display. It also now reads the SPF EEROM data upon startup and retains the information to avoid having to re-read it for each command.

The dplp_virtex_conf program is renamed to dplp_virtexcfg.

The dpl_reset and dplp_reset programs are removed from the distribution. These programs only reset device driver information and were used during initial development of the device drivers. This operation is performed by the dpl_init and dplp_init programs.

Changes in the LightParser Spartan FPGA

The following changes are in this version (0.3.2) of the Spartan FPGA for the LightParser board:
• Logic to detect the presence of the 77MHz and 39MHz clocks supplements the built-in logic that was able to detect when the clocks were locked but not if they were subsequently lost.
• Logic to complete SDRAM and Virtex accesses even of the required 77MHz clock is not present. This avoids possible system hangs should that clock become inactive. In such events, writes do nothing and reads return 0xe7 in all bytes.
• The address decode for Virtex configuration is now aliased to a lower address within the Spartan's register space. This will allow for reduced memory mapping size in future software versions.

Changes in the LightParser Virtex FPGA

The following changes are in this version (0.3.3) of the Virtex FPGA for the LightParser board:
• Support for new parser paths.
• Logic is added to not accept changes to the reference clock if the new clock to be selected is not present or not locked.
• A timing problem may still exist setting of the tributary type in the lovcrx module. A software work-around for this is currently implemented in the API.

Component Versions for This Release

The Channelization API software release includes several components of software and hardware FPGA configurations. All the components have the same major and minor version numbers. However the update version number of each component may vary depending on the number of changes and iterations each component has gone through between general distribution releases.

The components and their versions for DPL3 and LightParser Software Release 0.3.1 are:

Component:	Version:
API Library and Programs	0.3.1
Solaris Device Driver	0.3.1
Linux Device Driver	0.3.1
DPL3 Main FPGA Configuration (all variations)	0.3.0
DPL3 Expansion FPGA Configuration	0.3.0
Light Parser Spartan Configuration	0.3.2
Light Parser Virtex Configuration	0.3.3