May 24, 2004

Overview

Version 0.5.2 is a beta release of the Channelization API for DPL3 and LightParser Boards.

The "Channelization API Reference Manual", "DPL3 Hardware Reference Manual" and "Light Parser Hardware Reference Manual" describe details of the currently supported and unsupported features in the API and hardware.

The following changes are introduced in this release:

• DPL3: New Main FPGA configuration fixes L3 interface disable.

• DPL3: New Expansion FPGA configuration for boards without L3 support.

• DPL3: Additional initialization performed by the dpl_init program.

• DPL3: Bug fix in the L3 framer mode API function.

• DPL3: Added hardware error status interrupts.

• Modified utility programs.

• Modified diagnostic programs.

• Modified demonstration programs.

• Component versions for this release.

Notes:

This release includes new FPGA configurations for LightParser and DPL3 boards. Run the dplp_flashup or dpl_flashup program to update the FPGAs on the boards.

Normally software releases with the same major and minor version numbers are meant to be compatible. However, for LightParser, versions 0.5.1 and above include modifications to Virtex FPGA and API functions for E4 and STM-1 extraction that are not compatible with those in version 0.5.0.

This release is intended for evaluation purposes and does not represent the intended final production release. Some aspects of the application program interface (API) are subject to change as the software development continues to meet design requirements and usability issues.

DPL3: New Main FPGA Configuration Fixes L3 Interface Disable

The 3.3-volt VIO build of DPL3 Main FPGA is fixed to disable the L3 interface logic on DPL3 boards that are not populated with the L3 and expansion FPGA components. Previous versions could mis-interpret the missing signals as incoming L3 data causing errors on the board.

The 5-volt VIO build of the FPGA did not have this problem.

DPL3: New Expansion FPGA Configuration for Boards Without L3 Support

A new generic type FPGA configuration file for the Expansion FPGA is added to the distribution. The new FPGA configuration is required for DPL3 boards that are populated with the Expansion FPGA but are configured to provide 4 Comet interfaces and no L3 interface.

Note: this FPGA configuration was not part of the original 0.5.2 software distribution released prior to May 24, 2004.

DPL3: Additional Initialization Performed by the dpl_init Program

The dpl_init program now includes resetting of the clock synchronization logic and disables L3 channelization on DPL3 boards that do not include the L3 interface components.

DPL3: Bug Fix in the L3 Framer Mode API function

The API function, cac_l3_get_mode(), is fixed to properly set the bit in its return value to indicate whether the L3 Framer is configured for E3 or DS3 operation. This solved problems displaying L3 status with the dpl_framercfg program when configured for DS3 operation.

DPL3: Added Hardware Error Status Interrupts

The Main FPGA design and Linux and Solaris device drivers for DPL3 implement a new interrupt status and mask bit used to provide notification of certain error conditions on the board. The error conditions include DMA, page table entry, and internal channelization queue errors.

The interrupt capability is primarily provided for diagnostic and debugging purposes and is used in the dpl_framermon diagnostic program (see below).

Modified Utility Programs

In addition to the utility program changes described above, the following changes to programs are included:

The dpl_framercfg program for DPL3 now displays the loop-back setting when it configures a loop-back mode for the L3 interface. The program is also fixed to display the general usage summary if an invalid pulse mode parameter is specified for the -p option in case the option was given unintentionally.

Modified Diagnostic Programs

The dpl_framermon program for DPL3 has a new -E option that configures it to receive hardware error status interrupts from the board and display the error status information. When this mode is used the program opens the framer resource of the board, making the resource unavailable to other programs.

Modified Demonstration Programs

The dplp_file2file LightParser program includes the following changes:
• A global transmit done flag is added so that the receive threads can determine whether a timeout means the end of processed data or an error has occurred.
• Added -D option to specify that an STM-1 input file was recorded after de-scrambling of the incoming signal.
• Added -O option to specify an offset from the beginning if the input file to start sending data to the board.

Component Versions for This Release

The Channelization API software release includes several components of software and hardware FPGA configurations. All the components have the same major and minor version numbers. However the update version number of each component may vary depending on the number of changes and iterations each component has gone through between general distribution releases.

The component versions for DPL3 and LightParser Software Release 0.5.2 are:

Component:	Version:
API Library and Programs	0.5.2
Solaris Device Driver	0.5.2
Linux Device Driver	0.5.2
Light Parser Spartan Configuration	0.5.3
Light Parser Virtex Configuration	0.5.1
DPL3 Main FPGA Configuration	0.5.4
DPL3 Expansion FPGA Configurations
E3 G751 E1 variation	0.5.2
E3 G832 Bulk variation	0.5.2
DS3 M13 T1 variation	0.5.2
Generic (no L3) variation	0.5.2