July 1, 2005
Overview
The following changes are introduced in this release:
Items Specific to DPL3:
General Items:
Notes:
Version 0.7.5 is a beta release of the Channelization API for DPL3 Boards. It is considered a patch and was issued after other changes were made in the 0.8.x series of releases.
DPL3: Modifications to Avoid Problems Associated with EEROM Access
Modified the dpl_init program to read all EEROM locations to cause all the values to be stored in the device driver cache.
Fixed the cacopen() function to not request checking the board's configuration space (with the CAC_OPEN_FIX_CONFIG flag) by default. Fixed the Linux device driver to only check the lower four bits of the PCI configuration space command register. These two bugs combined to cause the cached EEROM data maintained by the device driver to be cleared whenever the board was opened using the cacopen() function.
Modified the EEROM access functions to obtain and release an exclusive access lock to prevent concurrent processes or threads from accessing the EEROM control register at the same time.
Note: The modifications in this release are not continued, directly, in the 0.8.x series of releases. These, or similar, changes will be included in the release 0.8.3 for DPL3 as well as LightParser and LightParser2 boards.
Component Versions for This Release
The component versions for DPL3 and LightParser Software Release 0.7.4 are:
| Component: | Version: |
| API Library and Programs | 0.7.5 |
| Solaris Device Driver | 0.7.3 |
| Linux Device Driver | 0.7.5 |
| LightParser Spartan FPGA Configuration | 0.7.1 |
| LightParser Virtex FPGA Configurations | |
| Standard SDH/PDH variation | 0.7.0 |
| ATM variation | 0.7.3 |
| Experimental SDH/PDH variation w/ E1 XMT rate adjust | R.9 |
| DPL3 Main FPGA Configuration | 0.7.3 |
| DPL3 Expansion FPGA Configurations | |
| E3 G751 E1 variation | 0.7.2 |
| DS3 T1 variation | 0.7.2 |
| E3 G832 Bulk variation | 0.7.0 |
| Generic variation | 0.7.1 |
NDFs, announced and unannounced, are not properly handled in TU-12s.Data corruption has been reported when recording raw, descrambled STM-1 signals that include AU3s.
Using the clock extracted from the electrical (CMI) port in STM-1 mode causes some data corruption. Work-around is to use the local clock reference when receiving electrical STM-1.
The ATM version of the Virtex is not able to frame DS3 streams from SDH streams. A work-around is to route the raw DS3 streams from SDH input through the Quad-T3 port, loop the signal back in and frame the DS3s from the Quad-T3 input.
Detection of ATM client channel overflow (pointers to the bulk ATM buffer that are no longer valid) is not yet implemented in the ATM service of the device driver.
ESF framing is not yet supported for transmitting DS1 streams multiplexed to the output DS3 signal.Possible failure of framing logic for embedded E1 or DS1 streams after configuration of Expansion FPGA. See the discussion of this topic for details.