September 8, 2006
Overview
Items Specific to LightParser2:
Items Specific to LightParser:
Items Specific to DPL3:
General Items:
Note:
LightParser2: Improvements to the Optical Interface Framer and Payload Aligner
Logic is added to use the MGT to oversample lower-rate signals which eliminated the need for a separate signal path for STM-1 signals. This method also provides the means for receiving arbitrary signal rates, described later.
The API function, the cac_if_set_refclk, is modified to check additional clock status from the hardware to determine if the clock synchronizers need to be reset.
LightParser2: Enhancements to the SDH/SONET Groomer
The Auto AIS feature replaces data to groomer outputs with an AIS pattern for any STM-0 whose input whose source has lost signal or synchronization. This feature is enabled or disabled separately for each groomer output port. If an input port is declared "bad", output ports with Auto AIS enabled will generate AIS for any STM-0 mapped from that input.
The Auto AIS mode is controlled in the FPGA with bits 0 through 3 of the FPGA's control register at offset 0x818. Software control is provided in a new API function called cac_sdhgroomer_autoais and with a new command in the lp2_sdhgroom program called "autoais".
Note that the groomer's Auto AIS feature is somewhat redundant for the two optical port inputs because they come through the payload aligner which has it's own AIS generator to replace unsynchronized data. This feature will be more useful in the future when the groomer can accept inputs from the channelizer and SDH parser.
The canned pattern feature allows specific STM-0 outputs from the groomer to be fed from internally generated patterns;
The patterns are selected using new values for the groomer control registers that act as special source values for the STM-0 output being controlled.
The algorithm for inserting the PRBS9 and PRBS9-inv patterns into the payload and calculating the B3-bits is selectable to be SDH (AU3) mode or SONET (STS-1) mode. The control is located in bit 8 of the FPGA's control register at offset 0x818. Note that the payload insertion mode for the PRBS9 and PRBS9-inv patterns is global for the entire groomer.
Software control of the canned patterns is provided in new API functions: cac_sdhgroomer_map_pat to map specified patterns to specified STM-0 outputs and cac_sdhgroomer_patpayload to select the payload insertion mode for the PRBS9 and PRBS9-inv patterns. The lp2_sdhgroom program supports the canned patterns with new commands, "groompat" and "patpayload". The canned patterns are also supported by the "groomdesc" command.
LightParser2: Support for Direct Optical Port Receive and Transmit Channels
The implementation includes new channelizer source selectors for choosing the source of data and timing for receive channels and choosing the source of timing for transmit channels and a new selection for source of data to be transmitted to the optical ports.
Software support for the new modes includes the following updates:
The API function library includes modifications and new macros for the cac_chan_source function that allow selecting the source for receive and/or transmit channels (separately or at the same time). The choices for channelization sources include the groomer, direct optical, packet processing, loop-back and simulation. The source for what is transmitted on each optical port is selected using the cac_if_set_tx_mode function with new macros to choose either the groomer or channelizer.
For purposes of the support programs, the host channelizer is considered to be an I/O port. The lp2_portcfg program has new command line options to select the source for receive and transmit host channels and the source for data being transmitted to the optical ports. It also has a new option to display the current or new configuration modes. The lp2_portstat includes receive and transmit source selections when displaying the configuration settings.
The lp2_send diagnostic program is now implemented and supports transmitting raw STM-1 and STM-4 streams, presuming that the optical ports and channelization sources have been properly configured. STM-16 transmit is theoretically supported, but the bandwidth of the DMA transfer reading from the host is not fast enough, resulting in data corruption.
The stream IDs for host channels receiving or transmitting directly on the optical ports are based on which optical port and stream type are involved. The table, below, shows the stream ID for each port and type.
Stream IDs for Direct Optical Port Channels Port STM-1 STM-4 STM-16 * Opt A ID = 0 ID = 0 ID = 0 Opt B ID = 4 ID = 1 ID = 1
These stream ID values are used as arguments for the cac_chanopen_stream API function or command line options for the lp2_recv and lp2_send programs.
* Note that only one port at a time may be enabled for direct I/O with STM-16 streams.
LightParser2: Support for Receiving Optical GIGE and other non-SDH Signals
New and modified API functions support the configuration of the VCXO FracN and the MGT oversampling for receiving optical signals at non-SDH (or non-SONET) rates. These are briefly described below:
cac_if_vcxo_params - determines parameters for FracN and MGT oversampling configuration to receive a specified signal rate. cac_if_rx_oversamp - sets or reads the MGT oversampling rate. This function should be used after setting the basic port modes with cac_if_set_rx_mode. cac_fracn_load - loads the control value into a FracN device. cac_if_get_rcv_rate - reads the current settings of the MGT control register and FracN device and computes the configured clock and signal rates. cac_if_set_rx_mode - two new mode macros are defined for this function; DPLP2_IFMODE_RX_GIGE and DPLP2_IFMODE_RX_VCXO, are used to configure the MGT to use the VCXO reference clock and, for _GIGE, to select level 5 stream buffering for the channelizer. cac_chan_source - a new macro is defined; DPLP2_CHANSRC_RX_8B10BPK, is used to select data from the 8B10B decoder to be the source of host channel data. cac_chan_open_stream - a new macro is defined; CAC_CHAN_MODE_GIGE, for the channel mode flags when opening a raw or 8b10b decoded GIGE stream. This macro is also valid for other functions that have a stream type argument, such as cac_latency_ms2bytes and cac_stream_kbits_sec.
The lp2_portcfg and lp2_portstat programs have added support for GIGE signals and host channelizer sources for raw or 8B10B decoded GIGE data. The lp2_portstat program also displays the VCXO and oversampling configuration if any of the optical ports are configured to use the VCXO. The lp2_recv program includes support for capturing GIGE streams (raw or 8B10B mini-packets, as configured with lp2_portcfg).
API functions and a support program are under development for extracting ethernet packet data and timestamps from the 8B10B mini-packets and converting the information to libpcap compatible files. This software currently is available as a separate, developmental package.
LightParser2: Implementation of a Real-Time Clock and Trickle Data
The real-time clock consists of two 32-bit counters. A high-resolution counter indicates ticks of the 19.44 MHz time base. It wraps when it reaches a value of 19,399,999 and increments the low-resolution (seconds) counter. These counters are currently utilized for inserting time stamps into header fields of the decoded 8B10B mini packets for GIGE traffic.
Trickle data is a means of providing a low rate stream of data to produce a guaranteed minimum data rate to host applications for streams that may contain no real data for long periods of time. The primary purpose of this is to flush the host buffer notification mechanism so that host applications are made aware of small amounts of available data. The trickle data is sent in blocks (packets, cells, etc) with a fixed size based on the type of traffic being received. Host applications must be able to distinguish or ignore the content of the trickle data. This feature is currently used allow a small number of duplicate 8B10B mini packets, that would otherwise be suppressed, through a receive channel.
The following new API functions are provided to control these features:
cac_rtc_seconds - sets the real-time clock seconds counter. It can be used to initialize the time stamps to some known value, such as the host system's clock. cac_trickle_rate - controls the rate of trickle data blocks in units of blocks per second. For GIGE traffic it is 8B10B mini-packets per second.
LightParser: New Latency, Snap-Shot and Flush DMA Mechanism
The snap-shot mode for receive channels has the board fill the channel buffer and automatically disable the channel to avoid overflowing. the channel. The data remains undisturbved in the channel buufer allowing time for the host application to examine the data. A snap-shot is initiated using the cac_chan_snapshot function in place of the cac_chan_enable function. The application may request subseqent snap sots by calling the function again. This mode has been previously available for LightParser2 boards. The dplp_recv program supports snap shots with the -N option.
The LightParser Spartan FPGA includes a fix to utilize all bits specified for the DMA scaler in channel descriptors. It also includes new logic to implement DMA buffer fill and queue flushing for use with future implementation of bursty stream types.
LightParser: Enhancements to the dplp_streamstat Program
The program also has a new command line option, -l, that specifies the minimum level for which status should be displayed and, if the -c option is given, the minimum level to which the parser should be configured. For example, if the specified parser path is STM1_VC3_E3_E2_E1 and the minimum level given is 3, status will only be displayed for streams down to the E3 level. If the -c option is given, the parser configuration is limited to the STM1_VC3_E3 path.
LightParser: Integrated SDH Transmit Support into the API and Support Programs
Updates to API functions for SDH transmit are:
cac_parse_tx_path_config - is a new function for configuring the transmit side of the parser to multiplex transmit channel streams into SDH structures. cac_parse_stream_status - is a new function for obtaining status of streams in the receive or transmit side of the parser. cac_parse_tx_stream_status - is a new function for obtaining status for transmit streams by calling the cac_parse_stream_status function. cac_parse_rx_stream_status - is modified to call the cac_parse_stream_status function. TX_MODE_SRC_SDH_TX - a new mode macro for the cac_if_set_tx_mode function to route multiplexed SDH parser output to the port for transmission. Several other new API functions are included to implement the lower level operations of configuring the multiplexing of the transmit parser.
The following support and diagnostic programs are updated for SDH transmit:
dplp_portcfg - has a new parameter for the -x option to select the multiplexed output of the SDH Tx parser as the source of data to be transmitted on the specified port dplp_streams - has a new -N option to specify the stream ID gapping pattern for transmitting SDH payloads with 64, 63 or 48 E1 streams dplp_streamstat - has new ability to display transmit status and configure the transmit parse path and a new -d option to specify the direction cacdp_tx_pdump - is a new diagnostic program that displays details of the transmit side of the parser configuration
The following new demo programs are included for SDH transmit configuration:
dplp_cfg_tx_au4_e1s - configures the parser for 63*E1 -> 63*VC-12 -> 3*TUG-3 -> AU-4 dplp_cfg_tx_au3_e1s - configures the parser for 63*E1 -> 63*VC-12 -> 3*AU-3 dplp_cfg_tx_interactive - interactively configures the parser for any supported signal structure allowing partial, complete and/or mixed multiplexing dplp_trace_msg - is an interactive program for reading and writing the path trace messages in the J0, J1 and J2 bytes of an SDH signal
An experimental version of the Virtex FPGA configuration is included with the release for development purposes. This FPGA version supports multiplexing 63 E1s up to 3 AU-3s or an AU-4. It does not, however, work for receiving E1 streams - the E1 framers do not appear to be working. To try this experimental version, copy the dplp-virtex-M07.bin file from the distribution directory (chanapi-0.8.2/hwdata/dplp) to the installed hwdata directory (/usr/cac/dplp/hwdata) and use it to update the FPGA configuration on the board with the command:
dplp_flashup -uv -xM.7 dplp0 dplp0
LightParser: New Registers for Spartan Version Information
LightParser: Support for New Virtex Configuration Types
DPL3: Added Limited Support for Unframed E1 Mode
Note that the "raw" mode channel type is only valid for the cac_chanopen_stream function. The affect of the mode setting is that the E1 framing pattern is not inserted into time slot 0 by the outgoing E1 multiplexer. All 32 bytes per frame are transmitted as sent by the host application.
A similar mode is set for embedded E1 receive channels. However, the unframed receive mode for the embedded E1 streams does not currently function properly - the received data is all ones for an incoming E1 stream that is not framed.
For the comet L1 framers, unframed transmit and receive mode have been supported by the API and may be configured by the dpl_framercfg program using the -u command line option. New to the API in this release is the automatic setting of the mode for ignoring framing information when a comet transmit channel is opened with stream type CAC_CHAN_MODE_E1_RAW. The mode is cleared when a comet transmit channel is opened with stream type CAC_CHAN_MODE_E1.
DPL3: Added Registers for Type and Version in the Expansion FPGA
Reporting of the type and version from the new registers is added to the dpl_info program. The expansion FPGA version from the register is added to the dpl_find program.
The cac_versions_get API function stores the version from the register in the fpga3_version member of the cac_versions_t structure passed as an argument.
A new API function, cac_get_exp_loaded_type is provided to read and report the configuration type from the Expansion FPGA registers. The cac_get_cfg_loaded_type API function is modified for DPL3 boards to report based on the contents of the FPGA register instead of the value stored in the EEROM by the dpl_flashup program.
Programs that play back recorded files can be told to play data from split files. These programs will attempt to open the next file in the sequence when they reach the end of the current file.
Split files are sequenced by appending an incrementing extension number to the file name that would normally be used. For example, instead of a single file named "stm1_data" the data will be spread across files named "stm1_data.001", "stm1_data.002", "stm1_data.003", etc.
This mode is designed to avoid any one file from becoming too large and is primarily intended for programs that handle high bandwidth streams. The following programs currently support split file mode:
dpl_recv, dplp_recv, lp2_recvPrograms that record to split files have options to control the size of each portion. Record and playback programs have the ability to control the number of digits used for the numeric extension.
dpl_send, dplp_send, lp2_send,
dplp_stm1raw and dplp_file2file
Updates and Fixes for the Device Drivers
For both Linux and Solaris drivers the read operation is modified to return success with a partial, non-zero amount of data if the operation is interrupted after some of the requested data has been transferred to the application's buffer. An error status is still returned, with errno set to EINTR, if no data has been copied when interrupted. This is how timeout and loss-of sync errors have been handled.
The write operation is modified to return success with a partial byte count in the case of a timeout or interrupt after some of the data has been transferred from the application's buffer to the channel. An error status is only returned if the timeout or interrupt occurs before any data is transferred.
The device drivers include code to be aware of GIGE channel rates for the purpose of determining the default timeout value.
In the Linux device driver, the functions for allocating channel buffers and transferring data between the buffers and user memory are fixed so that when using code for single-page per chunk allocation without the bigphysarea allocation functions, the allocation page size used is the board's DMA page size rather than the system page size. This problem could cause segmentation faults in the device driver but the situation only occurred with system running a 2.4 version of the Linux kernel that does not include the bigphysarea patch and for devices that use a DMA page size that is different than the system page size. This is currently only the case for LightParser2 boards.
New Serialization Time-Stamp Information
The dpl_serial, dplp_serial and lp2_serial programs (for DPL3, LightParser and LightParser2) are modified to store the current date in this location when changes are made to the serialization data. In the case where the serial number of a board is changed, the programs treat it as an initial serialization and clear any existing serialization update time-stamp.
The dpl_info, dplp_info and lp2_info programs are modified to display the date of the last serialization update if the the value is not blank.
Modifications to API Header Files to Allow Macro Inclusion
It was expected that only the top-level header files would be explicitly included. Each of those include chan_util.h which brings in all of the lower-level, feature-specific header files appropriate for the board being compiled for. However, it was sometimes desirable to only include specific header files, such as chan_parser.h or chan_l3.h, to define macros for classes or objects. This stopped working because some of the function prototypes that were moved to the board-specific and feature-specific files were dependent on data types declared in the higher level header file, chan_util.h.
To resolve the problem, the function prototypes and any other declarations in the lower-level header files that require macros or declarations from chan_util.h are now excluded if chan_util.h has not been included.
New and Modified API Library Functions
The cacopen function is modified to no longer include CAC_OPEN_FIX_CONFIG as one of the default open flags. This flags causes the device driver to check the board's configuration space registers and restore values that have changed. This is used for board development and testing where a hot-swap PCI extender may be used and was not intended to be one of the default modes.
There are new macros for the cac_chan_source function (for LightParser2) to support the new transmit and receive source selections described above. The function also has a new third argument which is a pointer to an integer that receives the previous source selections or the current selections if no change in the selection is specified.
New macros for selecting and reporting the source for optical transmit data for LightParser2 are defined for use with the cac_if_set_tx_mode and cac_if_get_modes functions.
The LightParser2 function, cac_if_get_rate is renamed to cac_if_get_cdr_rate to distinguish it from the new cac_if_get_rcv_rate function, described above. In addition, the macros used by cac_if_get_cdr_rate for reporting the signal type have changed - they no longer directly correspond to the optical port rcv mode macros. The changes are as follows:
| Old signal type | New Signal Type | |
| DPLP2_IFMODE_RX_STM16 | DPLP2_COMM_RATE_STM16 | |
| DPLP2_IFMODE_RX_STM4 | DPLP2_COMM_RATE_STM4 | |
| DPLP2_IFMODE_RX_STM1 | DPLP2_COMM_RATE_STM1 | |
| (none) | DPLP2_COMM_RATE_GIGE |
A new function for LightParser2, cac_if_tx_laser, provides on / off control of the optical port lasers independently from the other port configuration controls.
A new function, cac_queue_mode_dev, is added for determining the current queue handler mode using a non-exclusively opened handle to the board control resource (a CAC_HANDLE *). In addition, the cac_queue_mode_name and cac_queue_mode_num functions are modified to open the non-exclusive board resource instead of the exclusive access queue resource. These provide a method for applications to determine the queue handling mode without having to contend for the exclusive board resource.
A new function, cac_threadsafe_udelay is added to the library to provide a thread-safe delay operation (using the select system call). The function takes a uint32_t argument specifying the number of micro seconds to delay (or sleep) and returns no value. Previously, some programs included their own local implementation of this function. Those programs are modified to use the new API function. Other programs that use the similar function, cac_usleep, from the cacipc library are not modified.
A bug is fixed in the cac_format_decimal_64 and cac_format_decimal_32 functions. The problem could cause groups of thousands with no value to be skipped. (e.g. 1,000,234 might have been displayed as 1,234).
The lp2_portcfg program includes support for GIGE signals, as described above, and also has the following new options:
In addition, the program no longer requires the -p option, assuming both optical ports if no port is specified. Many of the parameter numbers for the -r and -t options have been replaced by letters to provide more meaningful codes. Numbers are still used for the signal types.
The lp2_portstat program is modified to support GIGE configuration, as described above. It also is modified to include the optical port transmit and host channelization sources in its display of the current configuration modes. The diagnostic display section has been fixed to properly indicate when no signal is present rather than a false frequency reading.
The lp2_sdhgroom program includes support for new features (described above) and also includes the following changes:
The dplp_portcfg, dplp_streams and dplp_streamstat programs are modified to support SDH transmit modes and new receive parser paths, as described above. The dplp_portcfg program is also modified to support a bit-stream level remote loop-back. Setting the transmit source to LoopbackRx using the option, -x 7, configures the port to re-transmit the received signal without any framing or reframing of the payload.
The dplp_portstat program is modified to include register numbers in the display of the Quad E3/DS3 interface status.
The dplp_clock program now has a -q option to run "quiet" for use in shell scripts.
The _memtest and _dmatest programs are modified to clear the channelization control register after calling the cac_chan_sim_clr library function to make sure any normal, default settings are cleared. The status displays of these programs are modified to indicate whether the iterations are memory of DMA test iterations.
The _debug programs have a new "delay" command to use in a sequence of commands (separated by semicolons or in a script file) that requires some delay time between operations. These programs are also fixed to not crash when an empty command is encountered between semicolons.
The lp2_send program is now implemented to support the LightParser2's new ability to transmit raw SDH streams.
All of the _send programs and modified to hold off enabling the transmit channel until the channel buffer is half full instead of after the first write to the channel, which may only put a small amount of data in the buffer. These programs are also modified to include a -S option to specify parameters for split file mode, a -v option to display channel parameter information, and to reduce how often the transmit amount is updated to improve performance. The later change can be disabled by specifying the new -d option.
The lp2_recv program is fixed to use correct default names for STM-4 and STM-16 streams and, when run in "snap-shot" mode, to not add a numeric file name extension when a single snap-shot is requested. It also has added support for GIGE channels.
All of the _recv programs have the following modifications:
New and Modified Demonstration Programs
The lp2_pktest program is modified to use new arguments for the cac_chan_source function.
The dplp_stm1raw program is modified to include a -S option to specify parameters for split file mode. It is also modified to reduce how often the file size status is updated for performance improvement.
The dplp_file2file program has the following modifications:
There are new LightParser configuration demo programs for transmit SDH configuration, as described above. In addition, the new dplp_cfg_au4_c12s program configures the parser to extract C12 payloads from an AU4 -> C4 structure.
The dplp_e1play and dpl3_e1play programs are modified to not quit if some of the files (with names based on a range of stream ID numbers) do not exist. The programs continue to operate with channels for the available files. They are also modified to allow the use of a full path name for the base name of files.
Several demo programs are modified to use the new cac_thread_safe_udelay API function instead of a local implementation.
Component Versions for This Release
The API and device driver components have the same major and minor version numbers. Similarly, the "HW Support" versions have the same major and minor version numbers as the corresponding FPGA or FPGA type. However the update version number of each component may vary depending on the number of changes and iterations each component has gone through between general distribution releases.
The component versions for Software Release 0.8.2 are:
| Software Components | Version | ||
| API Library and Programs | 0.8.2 | ||
| Solaris Device Driver | 0.8.2 | ||
| Linux Device Driver | 0.8.3 | ||
| Hardware Components | FPGA Version | Support Version | |
| LightParser Spartan FPGA Configuration | 0.8.1 | 0.8.1 | |
| LightParser Virtex FPGA Configurations | |||
| Standard SDH/PDH variation | 0.7.0 | 0.7.0 | |
| ATM variation | 0.7.3 | 0.7.3 | |
| SDH/PDH Transmit variation | n/a | n/a | |
| LightParser2 Virtex FPGA Configurations | |||
| Standard SDH variation | 0.3.2 | 0.3.2 | |
| LightParser2 Boot FPGA Configuration | 0.0.1 | 0.0.1 | |
| DPL3 Main FPGA Configuration | 0.7.3 | 0.7.3 | |
| DPL3 Expansion FPGA Configurations | |||
| E3 G751 E1 variation | 0.7.3 | 0.7.3 | |
| DS3 T1 variation | 0.7.3 | 0.7.3 | |
| E3 G832 Bulk variation | 0.7.3 | 0.7.3 | |
| Generic variation | 0.7.3 | 0.7.3 |
NDFs, announced and unannounced, are not properly handled in TU-12s. This problem is resolved in an experimental, pre-release FPGA configuration, version f.28, included in the distribution. To load this configuration run the dplp_flashup program as shown below:dplp_flashup -uv -xf dplp0Data corruption has been reported when recording raw, descrambled STM-1 signals that include AU3s.
Using the clock extracted from the electrical (CMI) port in STM-1 mode causes some data corruption. Work-around is to use the local clock reference when receiving electrical STM-1.
The ATM version of the Virtex is not able to frame DS3 streams from SDH streams. A work-around is to route the raw DS3 streams from SDH input through the Quad-T3 port, loop the signal back in and frame the DS3s from the Quad-T3 input.
Detection of ATM client channel overflow (pointers to the bulk ATM buffer that are no longer valid) is not yet implemented in the ATM service of the device driver.
E1 insertion for STM-1 transmit does not work when configured with the dplp_portcfg program. This problem was introduced in the 0.8.2 release but was not discovered until Decemeber, 2007. It is fixed as of release 0.9.2. As a work-around for software releases between 0.8.2 and 0.9.1, the dplp_debug program may used to adjust the configuration following the use of the dplp_portcfg program as shown in the example, below.
dplp_portcfg -p0 -t67 -x5 dplp0 echo "wv 1020 0 ; wv a9 1" | dplp_debug dplp0
The GIGE 8B10B decoder only supports one optical port at a time and the API only supports using optcial port A.The command FIFO for PCI-to-SDRAM transfers is susceptible to overflows during high-rate transfers. In addition PCI-to-SDRAM writes can interfered with DMA transfers. These problems are being investigated and the host interface to SDRAM is currently only used for diagnostic purposes.
ESF framing is not yet supported for transmitting DS1 streams multiplexed to the output DS3 signal.Receiving unframed E1 or DS1 de-multiplex from E3 or DS3 does not work. The received data is replaced by all-ones.
Possible failure of framing logic for embedded E1 or DS1 streams after configuration of Expansion FPGA. See the discussion of "Initialization Problems" in the 0.7.0 release notes for details.
The device driver for DPL3, LightParser and LightParser2 boards does not work on the Intel variant of Solaris 10. The problem involves allocating DMA memory for channel buffers.Solaris is currently supported on Intel platforms up through Solaris 9. Solaris 10 is supported on Sparc platforms.
In the Linux 2.6 kernel, unloading the device driver can sometimes cause a page fault in the the kernel's routine for unregistering the device driver object. Less likely is a similar problem when the kernel attempts to register the driver object. The problem is being investigated.