August 20, 2007
Overview
Items Specific to LightParser2:
Items Specific to LightParser:
Items Specific to DPL3:
General Items:
Note:
LightParser2: Enhancements to the API Functions and Programs for Optical Port Configuration and Status
The cac_if_set_tx_mode function supports new mode macros:
| DPLP2_IFMODE_TX_GIGE | - | Configure optical ports to transmit a GIGE signal |
| DPLP2_IFMODE_TX_SFPDP1 | - | Configure optical ports to transmit a 1.0625 GHz SFPDP signal |
| DPLP2_IFMODE_TX_SFPDP21 | - | Configure optical ports to transmit a 2.125 GHz SFPDP signal |
| DPLP2_IFMODE_TX_SFPDP25 | - | Configure optical ports to transmit a 2.5 GHz SFPDP signal |
The cac_if_get_modes function will report GIGE and SFPDP receive and transmit mode settings but does not currently differentiate between various SFPDP signal rates. For SFPDP it will report the mode using the DPLP2_IFMODE_RX_SFPDP and/or DPLP2_IFMODE_TX_SFPDP macros.
Modifications to the cac_if_get_cdr_rate function allow it to detect and report SFPDP and GIGE frequencies for reporting the apparent signal type. This function does differentiate between the various SFPDP signal rates.
Both the cac_if_set_tx_mode and cac_if_set_rx_mode functions continue to use the TCXO frequency synthesizer by default to generate the reference clock for SDH signals (STM-1, STM-4 and STM-16) and the VCXO frequency synthesizer for GIGE and SFPDP signals. One of the macros, DPLP2_IFMODE_RX_TCXO, DPLP2_IFMODE_RX_VCXO, DPLP2_IFMODE_TX_TCXO, or DPLP2_IFMODE_TX_VCXO, may be included in the modes parameter to specify the frequency synthesizer to use. These macros are also included in the modes reported by the cac_if_get_modes function to report which frequency synthesizer is currently configured for the port's receive and transmit reference clocks.
The cac_if_tx_source function has new macros for SFPDP copy modes that are supported with the Packet FPGA configuration:
| DPLP2_TXSRC_SFPDP_SELF | - | Copy incoming packets from the same optical port |
| DPLP2_TXSRC_SFPDP_OTHER | - | Copy incoming packets from the other optical port |
| DPLP2_TXSRC_SFPDP_LOOP | - | Copy incoming packets from the same port with flow control |
The lp2_portcfg and lp2_portstat programs are modified to support configuration and reporting of these new options. Currently SFPDP support in these programs is limited to the 2.125 GHz rate.
Device Driver Support for Linux Kernel 2.6.11 and Higher (Including Red Hat Enterprise Linux 5)
This update provides support for the DPL3, LightParser and LightParser2 device drivers on Red Hat Enterprise Linux 5 which uses a kernel based on Linux 2.6.18.
Bug Fixed in the Solaris Device Driver
Updates to the API Library Functions
The cac_chan_source function used for LightParser2 is modified to report the current receive and transmit sources as DPLP2_CHANSRC_RX_NONE and/or DPLP2_CHANSRC_TX_NONE for settings that are not appropriate for the loaded FPGA configuration. For example, when the common registers are set for receiving data from the SDH groomer with the Packet processing FPGA loaded. Not all of the possible conditions are currently handled but the default register settings are.
The lp2_portcfg and lp2_portstat programs are modified as described above.
The _recv programs have a new -D option to specify a recording duration. Specifying a timed recording over-rides the maximum file size for a the recording and records for the specified duration.
Component Versions for This Release
The API and device driver components have the same major and minor version numbers. Similarly, the "Hardware Support" versions have the same major and minor version numbers as the corresponding FPGA or FPGA type. However the update version number of each component may vary depending on the number of changes and iterations each component has gone through between general distribution releases.
The component versions for Software Release 0.9.1 are:
| Software Components | Version | ||
| API Library and Programs | 0.9.3 | ||
| Linux Device Driver | 0.9.3 | ||
| Solaris Device Driver | 0.9.2 | ||
| Hardware Components | FPGA Version | Support Version | |
| LightParser Spartan FPGA Configuration | 0.8.1 | 0.8.1 | |
| LightParser Virtex FPGA Configurations | |||
| Standard SDH/PDH variation | 0.7.0 | 0.7.0 | |
| ATM variation | 0.7.3 | 0.7.3 | |
| HDLC variation | 0.9.0 | 0.9.0 | |
| SDH/PDH Transmit variation | n/a | n/a | |
| LightParser2 Virtex FPGA Configurations | |||
| Standard SDH variation | 0.4.3 | 0.4.3 | |
| Packet Processing variation | 0.4.5 | 0.4.5 | |
| LightParser2 Boot FPGA Configuration | 0.0.1 | 0.0.1 | |
| DPL3 Main FPGA Configuration | 0.7.3 | 0.7.3 | |
| DPL3 Expansion FPGA Configurations | |||
| E3 G751 E1 variation | 0.7.3 | 0.7.3 | |
| DS3 T1 variation | 0.7.3 | 0.7.3 | |
| E3 G832 Bulk variation | 0.7.3 | 0.7.3 | |
| Generic variation | 0.7.3 | 0.7.3 |
NDFs, announced and unannounced, are not properly handled in TU-12s. This problem is resolved in an experimental, pre-release FPGA configuration, version f.28, included in the distribution. To load this configuration run the dplp_flashup program as shown below:dplp_flashup -uv -xf dplp0Data corruption has been reported when recording raw, descrambled STM-1 signals that include AU3s.
Using the clock extracted from the electrical (CMI) port in STM-1 mode causes some data corruption. Work-around is to use the local clock reference when receiving electrical STM-1.
The ATM version of the Virtex is not able to frame DS3 streams from SDH streams. A work-around is to route the raw DS3 streams from SDH input through the Quad-T3 port, loop the signal back in and frame the DS3s from the Quad-T3 input.
Detection of ATM client channel overflow (pointers to the bulk ATM buffer that are no longer valid) is not yet implemented in the ATM service of the device driver.
E1 insertion for STM-1 transmit does not work when configured with the dplp_portcfg program. This problem was introduced in the 0.8.2 release but was not discovered until Decemeber, 2007. It is fixed as of release 0.9.2. As a work-around for software releases between 0.8.2 and 0.9.1, the dplp_debug program may used to adjust the configuration following the use of the dplp_portcfg program as shown in the example, below.
dplp_portcfg -p0 -t67 -x5 dplp0 echo "wv 1020 0 ; wv a9 1" | dplp_debug dplp0
Handling of extended packet lengths in the packet processing FPGA is not yet complete. Continuation "chunks" for HDLC (POS and LAPS) packets larger than 3072 bytes are implemented but packets that are aborted after one or more chunks are not terminated properly. Jumbo Ethernet packets from the electrical or optical ports are not yet supported.
Support for packet status and statistics is not yet implemented in the API.
ESF framing is not yet supported for transmitting DS1 streams multiplexed to the output DS3 signal.Receiving unframed E1 or DS1 de-multiplex from E3 or DS3 does not work. The received data is replaced by all-ones.
Possible failure of framing logic for embedded E1 or DS1 streams after configuration of Expansion FPGA. See the discussion of "Initialization Problems" in the 0.7.0 release notes for details.
In the Linux 2.6 kernel, unloading the device driver can sometimes cause a page fault in the the kernel's routine for unregistering a device driver object. Less likely is a similar problem when the kernel attempts to register the driver object. The problem is being investigated.
The device driver for DPL3, LightParser and LightParser2 boards does not work on the Intel variant of Solaris 10. The problem involves allocating DMA memory for channel buffers.Solaris is currently supported on Intel platforms up through Solaris 9. Solaris 10 is supported on Sparc platforms.