December 17, 2007

Overview

The following changes are introduced in this release:

Items Specific to LightParser2:

• Support for SDH and PDH parsing.
• Updates to SDH groomer functions and program.
• Modified optical port configuration logic and functions.
• Updates to the FPGA configuration utility.
• Added special SFPDP little-endian mode.

Items Specific to LightParser:

• Modified FPGA to prevent PCI burst transfers to the Virtex.
• Bug fix for configuring STM-1 E4 insertion.
• Updates to some configuration and status utility programs.

Items Specific to DPL3:

• Intermittent timing problems resolved.
• Added support for transmitting multiplexed DS-1 with ESF framing.
• Fixed receive and transmit of unframed E1 and DS-1 streams.
• FPGA and software support versions updated.

General Items:

• Device driver updates for DS-1 stream timeout value.
• Updates to the Linux start-up scripts.
• Updates to the API library functions.
• Modified utility programs.
• Modified diagnostic programs.
• New and modified demonstration programs.
• Component versions for this release.
• Known problems.

Note:

This release includes new FPGA configurations for DPL3, LightParser and LightParser2 boards, Run the dpl_flashup, dplp_flashup and/or lp2_flashup programs to update the appropriate FPGA configurations.

LightParser2: Support for SDH and PDH Parsing

This release includes software updates and a new FPGA configuration to support SDH and PDH parsing on LightParser2 boards. Enabling SDH/PDH parsing requires that the board's FPGA be configured with the new FPGA configuration type, called parser. A description of how to check and install the FPGA configurations appears below.

The current parser version can handle up to 4 STM-1 (or OC-3) input signals as mapped through the board's SDH groomer. The SDH groomer allows selecting STM-1 signals from either optical port whose inputs may be STM-1, STM-4 or STM-16 signals. The SDH groomer can also be used to map signals at the AU3 (or OC-1) level to the parser.

The SDH parser can

• demux all standard STM-1 (STS-3) structures to containers (C-11, C-12, C-3, C-4).
• demap PDH signals (DS-1, DS-3, E1, E3, E4) from standard containers.
• demux E4s to E3s, and E3s to E1s. (DS-3 to DS-1 demuxing is not currently supported).
• frame-align and extract bulk payloads from E3s and DS-3s.
• frame-align E1s (PCM30 or PCM31) and DS-1s (D4 or ESF).
• provide all containers, raw PDH signals, bulk level-3 PDH signals, and framed level-1 signals to host channels.

Notes:

• The parser provides flexibility to support non-homogeneous (mixed) payloads and simultaneous channels at desired levels.
• SDH container bytestreams are provided byte-aligned, without further alignment.
• Framed E1s are provided in aligned 32-byte frames. Byte 0 (and byte 16 for PCM30) contain the framing and control bits.
• Framed DS-1s are provided in the first 24 bytes of aligned 32-byte frames, with the remaining bytes containing undefined padding/fill. (DS-1 framing bits are not yet provided for framed DS-1)
• Raw and bulk PDH bitstream signals are provided unaligned within bytes.
• Raw DS-1 channels provide all 193 bits of each frame with no fill or padding.
• Neither SDH or PDH synthesis (for transmit streams) is supported at this time.

Two new programs are introduced for configuring the SDH/PDH parser.

• The lp2_parsercfg program is used to configure the parser and display status of the tributary streams and containers. It is similar to dplp_streamstat, for LightParser, with an option to specify which STM-1 bank to operate on, but it does not configure the I/O ports.
• The lp2_streams program controls the enabling of individual streams between the SDH/PDH parser and the host I/O channelizer (similar to dplp_streams for LightParser).

The other programs used to configure the LightParser2 for receiving parsed streams are:

• lp2_portcfg to configure the optical ports to receive the STM-1, STM-4 or STM-16 inputs and to select the SDH/PDH parser as the data source for host receive channels (-Rp option).
• lp2_portstat to report status of the optical ports, framers and payload aligner.
• lp2_sdhgroom to map which STM-1 streams from the optical port (STM-1, STM-4 or STM-16 inputs) to the parser inputs.

The parser design in LightParser is an updated version of the logic that is currently available for LightParser boards. The default stream bank size is 84 instead of 96 and the default stream number gapping (the mapping between payload stream numbers and parser stream IDs) is modified to fit the smaller bank size. It is possible to specify non-default bank sizes and gapping sequences for special purposes.

The API functions that convert stream numbers to stream IDs, cac_parse_payload_to_streamid and cac_parse_path_to_streamid, handle the default cases properly for the two board types. New variants of those functions are provided to handle non-default cases.

The board name, dplt0, in these example, may be changed to operate on other LightParser2 boards in the system, e.g. dplt1, dplt2, etc.

Some boards may already have a version of the parser FPGA type resident on the MMC card and require an update. To determine if a board's MMC already has a parser FPGA configuration, run the program:

    lp2_flashup -SA dplt0

That will list the current FPGA configuration types on the MMC along with their versions and will indicate which one is the default (the one loaded when the board is initialized after a power cycle or when the lp2_init program is run with the -R option).

If there is a parser FPGA configuration present, the program will indicate if there is a newer version for updating. Update the configurations with the command:

    lp2_flashup -A dplt0

If there is not currently a parser configuration, add it with the command:

    lp2_flashup -N parser dplt0

To load the FPGA with the parser configuration, run one of the commands:

    lp2_init -F parser dplt0
    lp2_init -D parser dplt0

The second version, with -D, makes the parser configuration the default FPGA configuration.

LightParser2: Updates to SDH Groomer Functions and Program

The data connections from the SDH groomer to the SDH parser use shifted byte lanes to reduce FPGA resource requirements. To account for this, the functions, cac_sdhgroomer_map, cac_sdhgroomer_map_pat and cac_sdhgroomer_getmap are modified to adjust the destination indices for mapping to the parser.

The index adjustments were previously handled in the lp2_sdhgroom program but only for the "groomparser" command. Now, with the index adjustments handled by the API functions, the "groomdesc", "groomtype" and "groomfixed" commands may now be used for the parser destination port and the "showmap" command now displays the correct sources for parser destinations.

Additionally, a bug is fixed in the cac_sdhgroomer_getmap function so that it now reads the proper groomer settings when the STM0 type is specified. The lp2_sdhgroom program has a new command, "clrgrm", to clear all of the groomer registers and its "rawmap" command is modified to display STM0 numbers as offsets from the first STM0 of the specified port, unless the port was specified as a numeric index.

LightParser2: Modified Optical Port Configuration Logic and Functions

The optical port configuration logic in the parser FPGA configuration includes new controls for setting the transmit data bit multiplier (used for transmitting at rates below the range of the reference clock synthesizer). The added control bits will, in an upcoming release, provide the ability to transmit data at arbitrary rates, other than the standard rates for STM-1, STM-4 and STM-16 signals.

The cac_if_set_tx_mode and cac_if_reset API functions are modified to set the new control bits to appropriate values. There is also a new function, cac_if_tx_multisamp, used to modify or determine the setting of the transmit multiplier, and a new function, cac_if_get_xmt_rate, that reads and reports all of the parameters and settings that affect the transmit data rate.

The multiplier control in older FPGA builds (e.g. the current standard FPGA configuration) is tied to the framer mode control and continues to work for standard optical data rates.

The LightParser2 function for determining clock synthesizer and over-sampling parameters for setting optical port rates, cac_if_vcxo_params has been renamed to cac_if_rate_params. Programs using the old name should be updated, but a macro is included to provide backward compatibility, temporarily. A new error code, CAC_ERR_INVAL_RATE, is used for the value of errno in cases where invalid or unsupported optical port rates are requested.

Two new functions are added to set and/or determine the host channelizer stream level. for channels receiving or transmitting directly from or to the optical ports. The cac_if_rx_chanlevel function is used for receive channel settings and cac_if_tx_chanlevel is used for transmit channel settings. The old cac_if_rx_chantype function is replaced by cac_if_rx_chanlevel. Programs using the old function should be updated, but a macro is included to provide backward compatibility, temporarily.

LightParser2: Updates to the FPGA Configuration Utility

The lp2_flashup program is used to maintain the FPGA configurations stored in the MMC card on LightParser2 boards. This release includes the following modifications to this program.

It is modified so that an FPGA type name may be specified, instead of an entry number, to select the FPGA configuration for the -D and -u options. The type name is one of the FPGA configuration types, such as "std", "packet" or "parser". When a type name is specified, the first entry having the specified name is selected.

A list or range of configuration entries to be erased may now be specified with the -E option. Previous, only one entry could be specified at a time.

A bug is fixed so that, when replacing a specified configuration entry with a different FPGA type, it will replace it even if it has a lower version than the version of the previous configuration in that entry.

LightParser2: Added Special SFPDP Little-Endian Mode

The packet processing FPGA configuration has a new mode to swap pair of data bytes. This mode is specially provided for SFPDP packet streams to allow recording of 16-bit data values in little-endian format. The mode is enabled by calling the cac_packet_config_rcv with the new macro, DPLP2_PKT_MODE_RXSWAP16, included in the pktmodes argument. Support for this "little-endian" mode is added to the lp2_analightrec demonstration program.

LightParser: Modified FPGA to Prevent PCI Burst Transfers to the Virtex

The PCI interface logic in the Spartan FPGA is modified to prevent burst transactions to the Virtex FPGA. This became necessary because changes to functions for writing parser configuration data resulted in code that could result in burst transfers when writing control data to the board. The registers and memory interface in the Virtex FPGA do not handle burst transfers.

LightParser: Bug Fix for Configuring STM-1 E4 Insertion

The dplp_portcfg program is fixed to properly set the STM-1 transmit mode when E4 insertion is request. This resolves a problem that was introduced as far back as release 0.8.2 but was only recently discovered.

LightParser: Updates to Some Configuration and Status Utility Programs

The dplp_portcfg program is also now able to configure the Quad E3/DS3 port to send data from the host.

The dplp_portstat program is modified to display the configuration of E4 insertion and to display error or other unusual conditions in all upper-case letters.

The dplp_streams program now supports configuring E3-bulk, C-11 and C-12 stream types and has added identification of the crossbar selection for the parser input source. Also, the source file name for this program is changed from "cacdp_streams.c" to "dplp_streams.c".

DPL3: Intermittent Timing Problems Resolved

Various initialization problems have been fixed and resolved with a combination of improvements to logic in the main and expansion FPGAs and software. These changes have eliminated the frame synchronization and channelizer failures that could occur after reconfiguring the expansion FPGA or switching the clock synthesizers between E3 to DS-3 modes.

DPL3: Added Support For Transmitting Multiplexed DS-1 with ESF Framing

DPL3 boards can now transmit DS-1 streams with ESF framing multiplexed up to the DS-3 output. There was a problem generating the proper CRC pattern which is now fixed.

This mode is set as part of the global embedded (or virtual) L1 framer modes with the dpl_framercfg program or the cac_l3_init() library function call from within user applications. Note that the ESF framing mode setting is common to all DS-1 streams received from and transmitted to the DS-3 stream. It is separate, however, from the setting for DS-1 streams to and from the Comet framers.

DPL3: Fixed Receive and Transmit of Unframed E1 and DS-1 Streams

The problem affecting unframed E1 and DS-1 streams received from E3 or DS-3 input has been resolved and correct data can now be received.

The cac_comet_init and cac_comet_config functions are fixed to set the proper register controls for transmitting unframed DS-1 when requested.

The format of unframed, raw DS-1 streams is changed for receive and transmit channels, and for the L1 comet streams and the embedded DS-1 streams for DS-3 input and output. The data now fills the buffer contiguously. Previously the data filled the first 193 bits of each 256 block of data (or each 24 bytes plus 1 bit), leaving 63 bit gaps of uninitialized data.

The transmit and receive setting of framed vs. unframed for the comet framers is now independent. However, the streams for all comets still have common settings and the comet framers, themselves, must be configured to enable framing or not.

DPL3: FPGA and Software Support Versions Updated

Several of the changes and fixes, described above, required changes to the hardware registers and corresponding changes in the API library. In order to enforce compatibility requirements, the major/minor version numbers for the DPL3 FPGAs and the software's hardware support are updated from 0.7.x to 0.9.x.

Device Driver Updates for DS-1 Stream Timeout Value

The computation of nominal timeout values for DS-1 streams is modified for LightParser2 boards to account for the fact that these boards transfer 32 bytes per frame for framed DS-1 streams, as opposed to the DPL3 which only sends 24 bytes for a full DS-1 stream.

Note that this capability is not currently implemented for LightParser boards but is it expected to be implemented in the same way as for LightParser2.

Updates to the Linux Start-up Scripts

The Linux start-up (RC) scripts for Linux are used to load the device drivers and initialize DPL3, LightParser and LightParser2 boards when the system is booted. They are also used to shut down the boards and unload the device drivers when the system is halted or rebooted. Similar scripts are also used on systems running Solaris.

The Linux scripts are modified to check that the device driver module is not already loaded before attempting to load the module. In some cases, the module may have become included in the system's device driver profile in which case the driver might be loaded before the board initialization scripts are run and the DPL3, LightParser and/or LightParser2 scripts would fail to complete the initialization process. The modified scripts will leave an existing driver module loaded and continue with the process of setting up device nodes and intializing the boards.

The Linux scripts are are also updated to work properly with Red Hat Enterprise Linux 5. Changes in the way start-up scripts are executed on Red Hat EL5 caused the CAC scripts to display trace messages, or nothing at all, instead of the typical "OK" or "Failed" messages.

Updates to the API Library Functions

In addition to the changes and enhancements to the API previously mentioned, the following additions and modifications are made to the API functions:

The data argument to the LightParser functions, cac_virtex_write and data pointer argument to cac_virtex_read are changed from uint8_t to uint32_t to accommodate the larger values that may be passed to other functions that call these. Other API functions and several programs are modified to change the arguments passed to these functions.

The cac_parse_rcv_path_config API function is modified to use the first element of its indices array to specify the STM-1 index (or bank) to be configured.

Several low-level API functions used to configure the SDH and PDH parser on LightParser and LightParser2 boards are modified to support the additional number of STM-1 banks. These changes are transparent to user-level applications using the cac_parse_rcv_path_config function for parser configuration.

The cac_chan_sim_set and cac_chan_sim_clr functions are modified for DPL3 boards in accordance with some register changes that affect how FPGA loop-back modes are implemented.

The cac_chanopen_stream function is modified to set Raw or Framed mode for DS-1 streams, in addition to E1 streams for LightParser and LightParser2.

Functions that compute channel latency in terms of bytes or time are modified for LightParser2 to handle the 32 bytes per frame they use for framed DS-1 channels.

Functions that compute channel latency byte counts from milliseconds, and vice-versa, are modified to account for the 32 bytes per frame of DS-1 streams received from LightParser2 boards. These functions include: cac_latency_ms2bytes, cac_latency_ms2p2bytes, cac_latency_bytes2ms, cac_latency_min_bytes and cac_latency_max_bytes.

Functions that compute hardware DMA counts and adjust latency byte counts are modified to account for the 193 bits per frame received for raw DS-1 channels from DPL3, LightParser and LightParser2 boards and the 32 bytes per frame received for framed DS-1 channels from LightParser and LightParser2 boards. These functions include cac_latency_adj_bytes, cac_latency_adj_p2bytes and the various cac_chanopen functions.

Modified Utility Programs

The dpl_flashup, dplp_flashup and lp2_flashup programs are modified to allow more than one board name to be specified on the command line.

The dpl_find, dplp_find and lp2_find programs no longer display lines for boards not found unless the board name is specified on the command line.

The dpl_info, dplp_info and lp2_info programs now include reporting of the overall software release version. The dpl_info program now includes a report of the loaded version of the main DPL3 FPGA, as read from its new version status register.

Modified Diagnostic Programs

The lp2_chantest and dplp_chantest programs have a new -B options used to specify the bank (which STM-1 parser) for streams. It is used to compute the stream IDs specified from payload stream numbers specified with the -f option. These programs are also modified to use the new API functions for translating payload stream numbers to parser stream IDs based on the default parser parameters.

All of the _chantest programs are modified to ignore padding bytes (bytes 24 - 31 in each frame) for Bulk DS-1 channels from DPL3 boards and Framed DS-1 channels from LightParser and LightParser2. The -S may now be used to specify additional DS-1 time slots (between 0 and 23) to be ignored.

The lp2_debug, dplp_debug and dpl_debug programs have a new -c option to specify commands on the command line (for use in scripts) and a new openx command that opens the specified device in exclusive access mode.

New and Modified Demonstration Programs

All of the LightParser demonstration programs that utilize the lower-level parser control and configuration functions to configure the parser are modified for changes in those functions.

Use of parser parameter block is added to the dplp_cfg_interactive, dplp_cfg_tx_interactive and dplp_file2file programs.

New LightParser2 demonstration programs, lp2_cfg_interactive and lp2_cfg_au3_e1s, for configuring the SDH/PDH parser. These are compiled from the same source code used for the corresponding LightParser (dplp_) programs. Note that the _cfg_interactive programs support mixed payload configuration.

The LightParser2 packet recording programs, lp2_packetrec and lp2_analightrec.c are fixed to display the proper order of magnitude for final average data rate.

Component Versions for This Release

The Channelization API software release includes several components of software and hardware FPGA configurations. The "Support Version" for hardware components are the version numbers for the software support of the particular board or FPGA configuration type.

The API and device driver components have the same major and minor version numbers. Similarly, the "Hardware Support" versions have the same major and minor version numbers as the corresponding FPGA or FPGA type. However the update version number of each component may vary depending on the number of changes and iterations each component has gone through between general distribution releases.

The component versions for Software Release 0.9.2 are:

Software Components	Version
API Library and Programs	0.9.4
Linux Device Driver	0.9.4
Solaris Device Driver	0.9.4
Hardware Components	FPGA Version		Support Version
LightParser Spartan FPGA Configuration	0.8.2		0.8.2
LightParser Virtex FPGA Configurations
Standard SDH/PDH variation	0.7.0		0.7.0
ATM variation	0.7.3		0.7.3
HDLC variation	0.9.0		0.9.0
SDH/PDH Transmit variation	n/a		n/a
LightParser2 Virtex FPGA Configurations
Standard SDH variation	0.4.3		0.4.3
SDH Parser variation	0.4.1		0.4.1
Packet Processing variation	0.4.6		0.4.6
LightParser2 Boot FPGA Configuration	0.0.1		0.0.1
DPL3 Main FPGA Configuration	0.9.1		0.9.1
DPL3 Expansion FPGA Configurations
E3 G751 E1 variation	0.9.0		0.9.0
DS-3 T1 variation	0.9.0		0.9.0
E3 G832 Bulk variation	0.9.0		0.9.0
Generic variation	0.9.0		0.9.1

Known Problems

The following problems are known to exist in this release:
• LightParser:

  NDFs, announced and unannounced, are not properly handled in TU-12s. This problem is resolved in an experimental, pre-release FPGA configuration, version f.28, included in the distribution. To load this configuration run the dplp_flashup program as shown below:

              dplp_flashup -uv -xf dplp0
      

  Data corruption has been reported when recording raw, descrambled STM-1 signals that include AU3s.

  Using the clock extracted from the electrical (CMI) port in STM-1 mode causes some data corruption. Work-around is to use the local clock reference when receiving electrical STM-1.

  The ATM version of the Virtex is not able to frame DS-3 streams from SDH streams. A work-around is to route the raw DS-3 streams from SDH input through the Quad-T3 port, loop the signal back in and frame the DS-3 signals from the Quad-T3 input.

  Detection of ATM client channel overflow (pointers to the bulk ATM buffer that are no longer valid) is not yet implemented in the ATM service of the device driver.

• LightParser2:

  Handling of extended packet lengths in the packet processing FPGA is not yet complete. Continuation "chunks" for HDLC (POS and LAPS) packets larger than 3072 bytes are implemented but packets that are aborted after one or more chunks are not terminated properly. Jumbo Ethernet packets from the electrical or optical ports are not yet supported.

  Support for packet status and statistics is not yet implemented in the API.

• DPL3:

  Raw E3 or DS-3 streams cannot be transmitted from the host because there is not a way to bypass the L3 framer.

  Bulk E3 or DS-3 payload content cannot be transmitted in alignment with the E3 or DS-3 frame sync. Bulk payloads that require such alignment, such as PDH structures cannot be transmitted from the host.

• Linux 2.6 Device Driver Problems:

  In the Linux 2.6 kernel, unloading the device driver can sometimes cause a page fault in the the kernel's routine for unregistering a device driver object. Less likely is a similar problem when the kernel attempts to register the driver object. The problem is being investigated.

  The memory suitable for DMA allocation may become unavailable over time. When this occurs, applications may not be able to open channels requiring large DMA buffers. Currently, the only work-around is to apply the bigphysarea patch to the 2.6 kernel.

• Solaris 10 Intel Support:

  The device driver for DPL3, LightParser and LightParser2 boards does not work on the Intel variant of Solaris 10. The problem involves allocating DMA memory for channel buffers.

  Solaris is currently supported on Intel platforms up through Solaris 9. Solaris 10 is supported on Sparc platforms.