January 25, 2010

Overview

The following changes are introduced in this release:

Items Specific to LightParser2e:

• Introduce support for LightParser2e board.

Items Specific to LightParser2:

• The FPGA type STD is now called Basic.
• FPGA updates fix SDRAM access and stream conflict problems.
• API changes required for LightParser2e support.
• Support for the 8B10B Mini-packet library is deprecated.

Items Specific to LightParser:

• None

Items Specific to DPL3:

• None

General Items:

• Implemented polled interrupt handling mode.
• Modified requirements for exclusive device access.
• Other changes to the device driver.
• New and modified API functions.
• Modified utility programs.
• New and modified diagnostic programs.
• Modified demonstration programs.
• Component versions for this release.
• Known issues.

Introduce Support for LightParser2e Board

LightParser2e is a PCI Express version of the LightParser2 board. The board and software are designed to provide enhanced capabilities compared the LightParser2 including:
• PCI Express host interface for operation in newer systems as well as enhanced transfer bandwidth.
• SDH parser can extract streams from up to 8 STM-1 streams (up from 4) for up to 512 E1 streams or 672 DS-1 streams.
• POS packet processing for up to 8 STM-1 streams (up from 4).
• New and additional clock synthesizers allow both optical ports to transmit at the same rate as their own recovered Rx clock.
• A newer and larger FPGA - Xilinx Virtex-5 (V5FXT130).
• 512 MB of DDR2 SDRAM and 128MB or RLD2 SDRAM for FDK usage.
• A detachable MNAND, instead of removable MMC card, for FPGA configuration data storage.

It operates using the the same device driver and API as LightParser2. The API and support programs are able to handle the operational and configuration differences at run time. This allows applications to support both boards at the same time even in the same system.

The initial release provides support for the SDH parser FPGA. A version of the packet processing FPGA, an SDH parser/multiplexer FPGA as well as an FDK will be available in future releases.

LightParser2: The FPGA Type STD is Now Called BASIC

The "STD" (for standard) FPGA type is now called "Basic". This is done to better convey the capabilities and use of this FPGA design.

The names for the configuration data files now begin with "lp2-basic-" instead of "lp2-std-" and the support programs that report FPGA types will report "basic" instead of "std". The lp2_init and lp2_flashup programs still accept "std" as the FPGA type on the command line, replacing it with "basic" if a "std" file or type name is not found.

The "standard" FPGA type may be dropped from future releases if all of its capabilities are provided by the "Parser" FPGA type.

LightParser2: FPGA Updates Fix SDRAM Access and Stream Conflict Problems

The SDRAM interface for all LightParser2 FPGA types is fixed to prevent problems due to rapid, consecutive write accesses from the host. The FPGA has always limited burst reads or writes to SDRAM, but some software changes (since the previous, 0.9.5 release) have resulted in more rapid consecutive write accesses, which uncovered a problem in the way the controller attempted to limit such accesses. The FPGA support version has been updated from 0.5.0 to 0.6.0 to prevent the new software from being used with older FPGA designs that are susceptible to data corruption if such accesses are generated.

Two different stream conflict problems are fixed in the Parser FPGA for LightParser2. The first problem involved level 1 streams (e.g. E1 or DS-1) being corrupted in the channelizer by higher level streams. An example where this could occur is when STM-1 pass through mode is used to provide a STM-1 stream while E1 streams are enable from a different STM-1.

The second stream conflict problem occurred in the SDH parser logic and involved level 1 streams being merged into higher level streams with the same ID number in some configuration cases. The corruption was in the higher level stream data so, for example, E1 or DS-1 streams were not affected.

LightParser2: API Changes Required for LightParser2e Support

In order to support both the LightParser2 and LightParser2e with the same API functions at run-time, it became necessary to make some changes to existing functions and deprecate others with enhanced replacements. These changes primarily involve the I/O port and clock synthesizer configuration functions as well as some SDH parser configuration functions.

Some functions required the addition of a CAC_HANDLE argument to allow determination of the board type. Functions that deal with clock synthesizer configuration required the single 32-bit control value to be replaced with an array of values to support the new synthesizer devices used on LightParser2e. Details of the changes are described in the general API notes section.

LightParser2: Support for the 8B10B Mini-packet Library is Deprecated

The basic FPGA configuration for LightParser2 included a mode in which optical GIGE streams were converted into packets of decoded 8B10 control and data information. This mode, along with code to process these "mini packets" on the host provided preliminary support for receiving optical GIGE packets.

This capability has been surpassed and replaced by the Packet Processing FPGA configuration and support for the 8B10B mini-packet processing has been deprecated. This includes minipkt library of functions for processing the 8B10B packets, the cacdp_minipkt interface module of the chanapi library as well as the lp2_gige8b10b demonstration program.

If necessary, the code can be re-enabled using the --enable-minipkt option to the software configuration script. However, the code is no longer supported and will eventually be dropped from the chanapi software distribution.

Implemented Polled Interrupt Handling Mode

A polling mode for handling certain interrupts from the board has been implemented for both the Linux and Solaris device drivers. In polling mode the the select() system call may be used to poll for certain interrupt conditions from the board. This is useful for applications where signal handling is difficult or impractical.

The interrupts that can be used in polling mode are:

• The Comet and L3 framer interrupts for DPL3
• The optical port status interrupt for LightParser, LightParser2 LightParser2e.
• The FDK (formerly OEM) interrupt for LightParser2 and LightParser2e.
• The TEST interrupt for LightParser2 and LightParser2e.
• The hardware error / status interrupt

Polling mode is enabled on a per-board basis and when enabled, all of these interrupts for the board are handled in polling mode instead of the usual signal mode.

Polling mode is enabled or disabled using a special ioctl request, CAC_IRQ_POLLMODE. Currently the device handle must be for the "framer" resource on DPL3 (e.g. the dpl0fram device name) or the "parser" resource on LightParser boards (e.g. the dplp0pars or dplt0pars device name). The argument for the ioctl() function is a pointer to an integer with one of the following values:

1		enable IRQ polling mode
0		disable IRQ polling mode
-1		no change, just report current mode

In all cases, the value of the integer is replaced with the current IRQ polling mode (prior to setting the new mode). The IRQ polling mode is automatically disabled when the "framer" or "parser" resource is released.

Applications poll for interrupt conditions using the select() system call with (at least) the file descriptor for the "framer" or "parser" resource set in the readfds argument to select(). Upon return from select(), the status of the readfds is tested for the "framer" or "parser" resource file descriptor being set.

An example of using IRQ polling can be found in the new lp2_irqtest diagnostic program. The source code is in the file, diag/cacdp_irqtest.c. Although the program only supports LightParser2 and LightParser2e, the method for handling DPL3 or LightParser interrupts is the same.

Modified Requirements for Exclusive Device Access

The requirements, enforced by the device driver, for allowing access to (opening) exclusive use resource have changed.

Unchanged are the basic principals:

• The "fram" (on DPL3), "pars" (on LightParser, LightParser2/2e) and "queue" resources (e.g. dplt0pars) are always opened in exclusive access mode. This is done to avoid contention and to force a single process ID for the delivery of interrupt signals.

• The basic control resource (e.g. dplt0, with no resource name after the board number) is opened non-exclusively by default because it is required for a variety of purposes that must be shared. But it can be opened for exclusive access using the CAC_OPEN_EXCL flag with the cacopen_with_flags function. Some applications may require exclusive access to prevent other activity with they perform their operations, for example the lp2_flashup program.

Previously, the device driver only checked for the requested resource being available when exclusive access was requested. This could lead to some contention and unexpected results since there is not a distinct separation of hardware resources, especially between the basic control and the "fram" or "pars" resources.

The new requirements, described below, take the usage of other resources on the board into account.

• For opening the "fram" or "pars" resource:
  it must not be in use by any other process
  AND the basic control resource must not be in use exclusively by any other process.

• For opening the "queue" resource:
  it must not be in use by any other process
  AND the basic control resource must not be in use exclusively by any other process.

• For opening the basic control resource with exclusive access:
  it must not be in use, exclusively or non-exclusively, by any other process
  AND neither the "fram", "pars" or "queue" resources can be in use by any other process.

Other Changes to the Device Driver

The release (device close) operation in the Linux device driver is modified to use the non-interruptible method for obtaining the the board-level mutex. This is is another fix for the problem of channel resources not being relinquished when programs terminate due to un-handled signals. The initial fix (see the notes for release 0.9.3) involved retrying the interruptible method a number of times but this became less reliable as the number of channels for a process increased. The use of the interruptible method can be re-instated, if necessary, by modifying a pair of new macros in cacdrv_options.h, CAC_RELEASE_INTERRUPTIBLE and CAC_RELEASE_MAX_MUTEX_TRIES (see the comments in cacdrv_options.h for details).

The LightParser2 device ID is added to the Linux device driver configuration script so that it appears in the list of device IDs searched for by the driver installation script that is run during system boot. The LightParser2 device ID is also added to the Solaris device driver configuration script so that it appears in the devlinks.entry file and added to the system's /etc/devlink.tab file.

The "framer_pid" and "framer_proc" members of the device information structure have been re-named to "signal_pid" and "signal_proc" to provide a better clue as to their purpose.

References to the "OEM" interrupt have been replaced with "FDK", including the macro, "CAC_IRQ_FDK".

Some code is added to the Linux device driver to aid in debugging channelization and queue entry issues. The code is excluded from the compilation by default to avoid using resources unnecessarily in normal usage.

New and Modified API Functions

Several API functions are added or changed to support differences between LightParser2 and LightParser2e boards at run time. Other functions are changed to provide additional or enhanced features. The following sections describe the major changes and additions grouped by the functional areas.

Refer to the API documentation for details on function usage. Unless specified, the changes only apply to LightParser2 and LightParser2e operations.

I/O and clocking status and control functions

New data type: cac_synthvals_t

This new type type is used for specifying and reporting the frequency control values for the clock synthesizer devices on LightParser2 and LightParser2e boards. The data type is actually an array of 32-bit values and the number of elements is defined by the macro, CAC_CLKSYNTH_NUM_FREQVAL.

The values are used differently depending on the board (or clock synthesizer) type but the data type provides a common interface for the API. For the SI5326 clock synthesizers on LightParser2e, the lower 8-bits of the 17 array values carry the clock divider control values. For the FracN clock synthesizers on LightParser2 boards, the first 32-bit value carries the single clock divider value for the control register in the FPGA.

cac_if_get_rcv_rate_cfg and cac_if_get_xmt_rate_cfg

These are new functions for reporting the current receive and transmit rate and clocking configuration for the optical ports. They replace the deprecated functions, cac_if_get_rcv_rate and cac_if_get_xmt_rate.

The most significant difference is the use of the cac_synthvals_t data type instead of a single 32-bit parameter) for reporting clock synthesizer control values. The new function names better reflect their purpose of reporting configuration as opposed to actual signal conditions. The names of the functions' parameters have also changed to refer to the clock synthesizers as "synth" rather than "fracn", which is specific to the LightParser2 board.

cac_if_get_rcv_rate and cac_if_get_xmt_rate

These two functions are deprecated and replaced by cac_if_get_rcv_rate_cfg and cac_if_get_xmt_rate_cfg.

These older versions continue to work in the same way as long as pointer parameter for reporting the FracN control value is NULL.

cac_if_get_recovered_rate

This new function reports the recovered clock rate and frequency for the specified optical receive port. For LightParser2e boards, the reported frequency and rates are based on the recovered clock of the GTX transceiver in the FGPA as well as the relevant over-sampling configuration. The results for LightParser2 boards are based on the recovered clock reported by the receive CDR device (external to the FGPA).

cac_if_get_reference_rate

This new function reports the reference clock rate and frequency for the specified optical receive or transmit port (specified as separate port and direction parameters).

cac_if_rate_params

This function is used to determine parameters and settings for the clock synthesizers and over-sampling logic. It is primarily used to configure for arbitrary, uncommon or non-standard signal rates.

It has been modified to support LightParser2e as well as LightParser2 with the addition of a CAC_HANDLE pointer parameter (as the first parameter) and by using the new cac_synthvals_t data type instead of a uint32_t * parameter for the frequency control value. Also, the data type for the PPM frequency difference is changed from uint32_t * to double * for better precision.

cac_if_osc_sel

This function is used to determine the clock synthesizer selected for a given set of optical port modes.

It has been modified to support LightParser2e as well as LightParser2 with the addition of a CAC_HANDLE pointer parameter (as the first parameter).

The clock synthesizers on LightParser2e boards are referred to by new macros: DPLP2E_CLKSYNTH_1, DPLP2E_CLKSYNTH_2, and DPLP2E_CLKSYNTH_3.

DPLP2_CLKSYNTH_TCXO and DPLP2_CLKSYNTH_VCXO are new macros for the clock synthesizers on LightParser2. They are actually the same as DPLP2_FRACN_TCXO_SEL and DPLP2_FRACN_VCXO_SEL but are meant to provide a similarity to the new LightParser2e macros.

cac_if_set_rx_mode, cac_if_set_rx_mode_rate cac_if_set_tx_mode and cac_if_set_tx_mode_rate

Aside from modifications to support LightParser2e boards, these functions are modified to pulse the affected transceiver's (MGT or GTX) power-down and reset controls when changes are made to the clock reference or other parameters that might require this operation in order to achieve proper signal acquisition.

cac_if_get_status

New clock error status is reported for the receive and transmit transceivers' reference clock. A reported error indicates if the clock synthesizer used as the reference for the port is reporting a loss of lock or other fault. New macros for these indicator bits set in the reported status word are DPLP2_IFSTAT_RXCLK_ERR and DPLP2_IFSTAT_TXCLK_ERR.

cac_if_get_modes and cac_if_tx_source

These functions are modified to report PRBS modes, if set, for LightParser2e boards.

The modes reported by cac_if_get_modes might include one of the new macros: DPLP2_IFMODE_RX_PRBS7, DPLP2_IFMODE_RX_PRBS23, or DPLP2_IFMODE_RX_PRBS31 as well as one of DPLP2_IFMODE_TX_PRBS7, DPLP2_IFMODE_TX_PRBS23, or DPLP2_IFMODE_TX_PRBS31. The current/previous source (psource) reported by cac_if_tx_source could be one of the new macros: DPLP2_TXSRC_PRBS_7BIT, DPLP2_TXSRC_PRBS_23BIT, or DPLP2_TXSRC_PRBS_31BIT.

Currently, setting PRBS modes requires modifying settings in the GTX control registers.

cac_if_tx_refclk

This is a new function used for both LightParser2 and LightParser2e to set and/or determine the configured source for an optical port's transmit clock reference. For LightParser2 it supersedes the source selection feature cac_if_pwm_control function but does not necessarily replace it. It is still available in the API.

cac_if_set_refclk and cac_if_get_refclk

Both of these functions are replaced by a new function called cac_if_sys_refclk. This function can set and/or report the current setting of the board's system reference clock. DPLP2_LOCAL_CLK remains the only valid board reference clock.

cac_fracn_params

This function, primarily used within the API, itself, is modified to report the PPM difference as a double rather than a 32-bit integer. The data type for this parameter is changed, accordingly.

cac_si5326_load, cac_si5326_read, cac_si5326_params and cac_si5326_params2

Although they are primarily used within the API, itself, these new functions are available for configuration of the SI5326 clock synthesizer devices on LightParser2e boards.

Parser configuration functions

cac_parse_estimate_rx_bandwidth

This new function is used to estimate the bandwidth of enabled streams between the parser and the host channelizer. It supports LightParser2 and LightParser2e boards.

cac_parse_set_bank_size, cac_parse_set_bank_gapping and cac_parse_set_stream_gapping_params

The names of these functions have been changed to cac_parse_set_rx_bank_size, cac_parse_set_rx_bank_gapping and cac_parse_set_rx_stream_gapping_params, respectively, to avoid ambiguity between them and their counterparts for configuring transmit side multiplexing (under development).

cac_parse_chk_rx_depth

This internal parser function has been renamed cac_parse_chk_pdh_rx_depth to avoid ambiguity between it and the cac_parse_chk_sdh_rx_depth function.

cac_parse_reg_addr, cac_parse_ram_addr, cac_parse_ram_byte_addr, and cac_parse_gen_ram_addr

These are internal parser functions that have been modified to support LightParser2e as well as LightParser2 with the addition of a CAC_HANDLE pointer parameter (as the first parameter).

cac_parse_path_to_streamid_params

This internal parser function is modified to support the transmit side configuration with the addition of a direction parameter.

Documentation re-organization

A new category (module) is added to better organize the documentation of the parser configuration portion of the API. The new category is called "Internal Parser Functions". Although the functions in this category are still exported for use in applications, they are primarily designed for use within the API.

Other configuration and general purpose functions

cac_chan_source

This function is modified to report the actual channel source selections based on the control register settings regardless of the FPGA type. Previously, the settings were reported as DPLP2_CHANSRC_RX_NONE and/or DPLP2_CHANSRC_TX_NONE if the FPGA type didn't support the register settings.

cac_packet_config_rcv

This function supports a new configuration mode flag, macro DPLP2_PKT_MODE_PRSFPDPCP, for preserving SFPDP copy modes that may have been set by a prior call to the cac_if_tx_source function.

cac_set_sdram_window and cac_get_sdram_window

These new functions set (or report) the host's SDRAM access window. This is the 32 MB region of the board's physical SDRAM that is accessed through the logical 32 MB memory mapped region. They take into account the different amounts of memory available on LightParser2 and LightParser2e boards and whether or not the RLDRAM interface is implemented by the current LightParser2e FPGA configuration.

These functions replace similar code that had been included in separate diagnostic programs as well as provide a supported mechanism for user applications that require SDRAM access.

cac_board_type

This new function is used to determine the board type for a given device handle. It supports all board types support by the ChanAPI library and provides an alternative to using the value of the handle's board_type structure member.

The board type is reported in a 32-bit value passed as a pointer parameter. The reported board type is one of a new set of macros: CAC_BOARDTYPE_DPL3, CAC_BOARDTYPE_DPLP, CAC_BOARDTYPE_DPLP2, CAC_BOARDTYPE_DPLP2E, and, to cover exceptions, CAC_BOARDTYPE_UNKNOWN.

New error code values set in the global errno variable to report the following errors in API function calls:

• CAC_ERR_MEM_RANGE - a specified memory or register address is out of range.
• CAC_ERR_INVAL_CLK - and invalid clock synthesizer device, clock source or frequency is specified.
• CAC_ERR_MDIO_INVAL - an invalid parameter is specified for MDIO or GIGE control.

New or changed macros not mentioned above:

• The DPLP2_FRACN_DFLT_REF macro is deprecated and replaced by DPLP2_SYNTH_DFLT_REF.
• The bit fields for the DPLP2_IFMODE_ macros are rearranged so that the signal and framing mode bits are separate from the clock mode bits.
• New data rate macros are added. These specify the nominal rates in k-bits (1000 bits) per second: CAC_CHAN_RATE_STM16FEC (2666057), CAC_CHAN_RATE_SFPDP1 (1062500), CAC_CHAN_RATE_SFPDP21 (2125000), CAC_CHAN_RATE_SFPDP25 (2500000) and CAC_CHAN_RATE_SFPDP (a synonym for CAC_CHAN_RATE_SFPDP21).
• EE_POP_FPGATYPE replaces EE_POP_FPGASIZE for the location of FPGA population option code in the EEROM.
• New FPGA type macros for LightParser2e: EE_FPGA_TYPE_V5FX130 and EE_FPGA_TYPE_V5LX155.
• STATUS_JTAGPOD replaces STATUS_CHIPSCOPE for the bit in the miscellaneous status register that indicates in the JTAG pod (used for FPGA configuration as well as Chipscope connectivity) is connected.
• Various other new macros that represent new register addresses and control or status bits have been added primarily for API internal use.

Modified Utility Programs

Many of the programs for LightParser2 include modifications to support the differences between LightParser2 and LightParser2e boards. These differences include FPGA configuration file names and data storage, clock synthesizers and configuration, no PWM calibration on LightParser2e. Most of these changes don't necessarily affect the operation or usage of the programs and are not described here. Minor changes were also made to some LightParser (dplp_) programs for compatibility with changes in the parser API functions. Changes to programs that do affect their operation and usage are described below.

The lp2_init program includes the following changes:

• Added backward compatibility for old FPGA file names, oem for the new fdk type and std for the new basic type.
• Added resetting of the SDH parser for LightParser2 and LightParser2e boards.
• Added code to avoid multiple warnings, per board, about FGPA version compatibility.
• A new -c option (added primarily for debugging) that asks the user to confirm that the FPGA has been successfully reconfigured before it continues.

The lp2_flashup program includes the following changes:

• Added backward compatibility for old FPGA file names, oem for the new fdk type and std for the new basic type.
• The erase configuration operation specified with the -E option will now erase the actual configuration data as well as clearing the information sector and directory entry. A new -e option is added for a "quick" erase operation that only clears the information sector and directory entry.
• Modified to store only the root part of the configuration file name if the default directory search is used.
• New -k and -l options are added for debugging the transfer length and clock rate of the MNAND device on LightParser2e boards.

The lp2_portcfg program includes the following changes:

• Added R parameter for the -t option to specify the source for the transmit reference clock. For LightParser2 it specifies which optical port's transmit FIFO is used to control the VCXO via the PWM circuit. For LightParser2e is specifies which optical port's recovered receive clock is used as the transmit clock synthesizer reference.
• Added -f option for specifying the FracN clock synthesizer value on LightParser2 boards. It is used for special purposes when a pre-computed value is required to result in a specific frequency.
• The configuration display (-c option) is modified to report the transmit reference source and PRBS settings for LightParser2e.

The lp2_portstat program includes the following changes:

• The raw CDR loss-of-lock (CDR LOL) is removed from the status display. The more useful, latched CDR loss-of-lock (LLL) status remains. No status is displayed for the non-existent transmit CDRs on LightParser2e.
• A new status, labeled CLK ERR, is reported for both receive and transmit ports. This indicates if the clock synthesizer used as the reference for the port is reporting a loss of lock or other fault.
• The configuration display (with -c option) is modified to report the transmit reference source and PRBS settings for LightParser2e. Receive and transmit reference clock rates are added to the verbose configuration report (with -v option).

The lp2_parsercfg program includes the following changes:

• General changes to support multiple parsers (4 STM-1s per parser).
• The parameter for the -i option may now be a single range of STM-1 indexes allowing multiple STM-1s to be configured with a single command.
• The delay between parser configuration and status reporting in increased for DS-1 extractions and is disabled if the parser is not being reconfigured.

The lp2_streams program includes the following changes:

• The program now computes and displays an estimate of the stream bandwidth between the parser and channelizer. This is meant to provide only a guideline for bandwidth usage. The absolute limit of available bandwidth has not yet been determined.
• The stream buffer conflict checking is modified to handle the different constraints between LightParser2 and LightParser2e.
• New options are added to disable the detailed display of buffer conflicts (-C), bandwidth estimates (-E) or both (-q). The -q option may be used to disable other messages in the future.
• The display option (-d) may now be used on the same command line with stream configuration options to display the results of the changes.
• Multiple bank number options (-b) may now be specified each with different framer list and payload size options (-f, -F and -N).

The lp2_info program has added reporting of the SDH parser version and the number of STM-1s it is capable of handling for the receive and transmit directions. This is only reported when the SDH parser FPGA type is loaded. This program, as well as dplp_info and dpl_info, may now be given a list of board names of the command line. Previously only a single board name or the keyword, "all", could be used.

The lp2_mmc program includes the following changes:

• The parameter for the -S command line can now include length and offset specifiers for reporting arbitrary amounts of data.
• New -T command line option for testing MMC or MNAND data sectors.
• New -W command line option to wipe all MMC or MNAND data.
• The command line option for loading an FPGA file is changed from -l to -L.
• The -l option is re-used along with new -k and -w options for testing transfer length, clock rate and data width of the MNAND device on LightParser2e boards.

Support for C-11 and C-12 streams is added to the dplp_streamstat program for LightParser boards.

New and Modified Diagnostic Programs

The lp2_prbstest program is a new diagnostic for LightParser2e. It configures the optical ports to use the PRBS pattern generator and checker built in to the Virtex-5 GTX and monitors the status.

The lp2_packetrec program is moved into the diagnostic category. Its source code is moved from the demo directory to the diag directory and the executable is installed with the other diagnostic programs. The program, itself, is modified to use the DPLP2_PKT_MODE_PRSFPDPCP mode flag to preserve SFPDP copy modes that may have been set by lp2_portcfg.

The lp2_chantest, dplp_chantest and dpl_chantest programs include the following changes:

• The programs now set the stack size attribute for their threads to allow for more threads and, therefore, more channels to be opened. The default stack size used is 1MB and it can be changed with a new -K option for experimental purposes.
• Added support for using the "parser simulator" feature of LightParser2e. This simulation mode currently provides up to 512 E1 streams for testing throughput and data handling. Also supported is the "tagged counter" (24-bit count with streamID in upper byte) feature of the LightParser2e test pattern generator.
• The -l option is now used to specify latency in milliseconds if the parameter ends in "ms". Otherwise the parameter is assumed to be in bytes, kbytes or mbytes, as before. The -L option, which is used to be used for specifying the latency in milliseconds, is deprecated.
• Updated the code for reading test configuration information files and added the ability to read test configuration from stdin if the file name parameter to th -F option is a dash: -.
• The programs now try to set the queue handling mode only if the current mode is different than the default or requested mode.
• Some bugs are fixed and enhancements made in the dynamic status display and the final status report issued if errors were detected.
• Some programmatic bugs are fixed that could cause segmentation faults under some conditions.
• Many of the seldom used options are no longer displayed in the usage summary unless the -v option is specified.

The lp2_memtest, dplp_memtest and dpl_memtest programs include the following changes:

• The parameter for the -t option can now be a comma-separate list of memory types to be tested. This provides an alternative to specifying multiple -t options.
• The behavior for testing SDRAM access windows for LightParser2 and LightParser2e boards is modified so that if the amount to test specified with the -l option is less than window size (32MB), the specified amount will be tested in all SDRAM windows.
• Added -E option to specify the maximum number of error details to display for each SDRAM access window. This is similar to the -e option but is applied separately to each SDRAM window on LightParser2 and LightParser2e boards.
• Added -w option for LightParser2 and LightParser2e to specify a single SDRAM window to be tested.
• Added -L option to specify a limit for the burst size in burst mode.

The lp2_vtmon and dplp_vtmon programs include the following changes:

• The default tolerance for declared voltages out of range is changed from 10% to 5%.
• Added -E option to display elapsed time. This takes precedence and replaces the cycle count display if both are requested.

The lp2_debug, dplp_debug and dpl_debug programs include the following changes:

• New commands are added to read the FPGA's internal frequency counters, read and write the GIGE (MDIO) interface, set the SDRAM access window, and select a "current parser" on LightParser2e boards.
• New commands are added to read and write the GIGE MDIO interfaces on LightParser2 and LightParser2e boards.
• The descriptions of commands to read registers, memory and other resources are modified to replace the word "dump" with "read".

The lp2_dumpcfg program is enhanced to report the PCIe capabilities information for LightParser2e.

Modified Demonstration Programs

As mentioned above, the lp2_packetrec program is now considered to be a diagnostic program and is moved out of the demo program directory.

The lp2_stm1rec program is fixed to use the proper macros for checking the incoming signal type reported by the cac_if_get_cdr_rate function. Also, the -D option is removed from this program because disabling descrambling is not applicable to receiving (already descrambled) streams from the SDH groomer on LightParser2/2e boards.

The code for several of the parser demonstration and interactive configuration programs is modified for compatibility with changes in the parser API library.

The lp2_gige8b10b program is no longer built by default and will eventually be dropped from the software distribution. (See 8B10B Mini-packet library deprecated, above.)

Component Versions for This Release

The Channelization API software release includes several components of software and hardware FPGA configurations. The "Support Version" for a hardware components is the version number for the software support of the particular board or FPGA configuration type.

The API and device driver components have the same major and minor version numbers. Similarly, the "Hardware Support" versions have the same major and minor version numbers as the corresponding FPGA or FPGA type. However the update version number of each component may vary depending on the number of changes and iterations each component has gone through between general distribution releases.

The component versions for Software Release 1.0.0 are:

Software Components	Version
API Library and Programs	1.0.0
Linux Device Driver	1.0.0
Solaris Device Driver	1.0.0
Hardware Components	FPGA Version		Support Version
LightParser2e Virtex FPGA Configurations
SDH Parser variation	0.6.0		0.6.0
Packet Processing variation	n/a		n/a
LightParser2e Boot FPGA Configuration	0.0.2		0.0.2
LightParser2 Virtex FPGA Configurations
Basic SDH variation	0.6.0		0.6.0
SDH Parser variation	0.6.0		0.6.0
Packet Processing variation	0.6.0		0.6.0
LightParser2 Boot FPGA Configuration	0.0.1		0.0.1
LightParser Spartan FPGA Configuration	0.8.2		0.8.2
LightParser Virtex FPGA Configurations
Standard SDH/PDH variation	0.7.0		0.7.0
ATM variation	0.7.3		0.7.3
HDLC variation	0.9.2		0.9.2
DPL3 Main FPGA Configuration	0.9.1		0.9.1
DPL3 Expansion FPGA Configurations
E3 G751 E1 variation	0.9.1		0.9.1
DS-3 T1 variation	0.9.0		0.9.0
E3 G832 Bulk variation	0.9.0		0.9.0
Generic variation	0.9.1		0.9.1

Known Issues

The following problems are known to exist in this release:
• LightParser2 and LightParser2e:

  When extracting E1 streams from signal structures containing 48 E1s, proper stream identification (using the default IDs) requires that the parser bank size be set to 48.

  Under certain circumstances, bit errors have been seen in one or two E1 streams de-multiplexed from an E3 contained in a TUG-3 from an AU-4 in the first STM-1 (signal structure: STM-1->AU-4->TUG-3->VC-3->E3->E2->E1). The errors have not been observed in other STM-1s with this structure or with other signal structures. The problem has also not been observed if the gapping for the STM-1 is set to the minimum of 48 using the -m or -g48 command-line option to the lp2_parsercfg program.

  In the SDH parser, DS-3 streams from the fourth STM-1 cannot be framed or extracted using their default stream IDs.

  Parser stream status for extracted C-3 and C-4 streams is not accurate for all STM-1s. The lp2_parsercfg program may report "0" for the status when, in fact, the streams is being properly extracted.

  Optical port transmit is limited to transmitting SDH signals at nominal rates based on the board's local clock or using direct re-transmission (loop-through) from an optical input. Although the optical transmitters can be configured to send arbitrary rates, there is not a way to use such rates for moving data.

  Transmit capability for LightParser2e is limited to 2 channels of raw SDH streams (direct to the optical ports). Attempting to use the lp2_chantest program with more than 10 or 11 transmit streams will results in data errors.

  Optical port reference clock routing configuration for LightParser2e is not yet implemented in the API. The default clock routing allows independent clock clock for the receiver and transmitter on optical port A but not, yet, optical port B. Optical port B's receiver and transmitter share a common reference clock. When configuration is implemented, the options will allow for independent clock references for optical port A and B transmitters, with optical port A and B receivers sharing a common reference.

  Packet processing FPGA configuration is not yet released for LightParser2e.

  Handling of extended packet lengths in the packet processing FPGA is not yet complete. Continuation "chunks" for HDLC (POS and LAPS) packets larger than 3072 bytes are implemented but packets that are aborted after one or more chunks are not terminated properly. Jumbo Ethernet packets from the electrical or optical ports are not yet supported.

  The statistics counters for optical and electrical GIGE packets cannot be cleared except by reloading the FPGA configuration.

• LightParser:

  NDFs, announced and unannounced, are not properly handled for TU-11 and TU-12 pointers. This problem is resolved in an experimental, pre-release FPGA configuration, version f.28, included in the distribution. To load this configuration run the dplp_flashup program as shown below:

              dplp_flashup -uv -xf dplp0
      

  Some unannounced TU-3 pointer changes are not handle correctly which causes the tributaries from the affected pointers to go out of sync.

  Data corruption has been reported when recording raw, descrambled STM-1 signals that include AU3s. This condition can normally be cleared up by resetting and reconfiguring the parser.

  Using the clock extracted from the electrical (CMI) port in STM-1 mode causes some data corruption. Work-around is to use the local clock reference when receiving electrical STM-1.

  The ATM version of the Virtex is not able to frame DS-3 streams from SDH streams. A work-around is to route the raw DS-3 streams from SDH input through the Quad-T3 port, loop the signal back in and frame the DS-3 signals from the Quad-T3 input.

  Detection of ATM client channel overflow (pointers to the bulk ATM buffer that are no longer valid) is not yet implemented in the ATM service of the device driver.

• DPL3:

  Raw E3 or DS-3 streams cannot be transmitted from the host because there is not a way to bypass the L3 framer.

  Bulk E3 or DS-3 payload content cannot be transmitted in alignment with the E3 or DS-3 frame sync. Bulk payloads that require such alignment, such as PDH structures cannot be transmitted from the host.

• Linux 2.6 Device Driver Issues:

  The kill_proc function has been removed from the Linux kernel version 2.6.27 and above. Modifications for replacing its use in the device driver are underway and update will be released soon.

  Memory suitable for DMA allocation may become unavailable over time. When this occurs, applications may not be able to open channels requiring large DMA buffers. Currently, the only fix is to reboot the system and the only preventative work-around is to apply the bigphysarea patch to the 2.6 kernel.

  When using the 64-bit variant of the Linux kernel included with Red Hat Enterprise 4, DMA buffer allocation is limited to about 12 MB. This problem has been found in all RHEL4 updates up to and including RHEL 4.7. Currently, the only work-around is to apply the bigphysarea patch to the 2.6 kernel. This problem has not appeared in Red Hat Enterprise 5, which has been tested up to RHEL5.4.