The installation of the Solaris device driver now correctly puts the pcie1drv.conf file in /usr/kernel/drv for both 32-bit and 64-bit systems.

The Linux device driver is fixed to return the number of bytes transfered as the status when reading from a signalling channel.

When the Linux device driver is installed, using the make install-dev command, the driver module is copied into the directory, /lib/modules/kernel-version/misc. The bootup initialization script now looks for the driver module there rather than the directory in which it was built.

The default number of boards configured for the Linux device driver has been changed from 1 to 4. This only affects the number of deivce entries created in /dev by the make install-dev command and the boot-up initialization script. It does not matter if fewer boards are actually installed in the system.

The Windows (2000 & XP) device driver is fixed to not loose error status when it returns data that was available prior to the error.

The changes are only implemented in the functions provided specifically for access of the DM5420 modules. When transferring data to and from DM5420 modules, the dm5420_up_.. and dm5420_dl_.. functions should be used rather than the generic DPT4 transfer functions.

New library functions are provided for accessing registers in the E1/T1 framers (Comet chips) and the H.100 interface. The new functions are named comet_peek8, comet_poke8, h100_peek8 and h100_poke8 and are documented in the DPT4 Programmer Reference Manual (version 1.4.0 or higher). These functions must be used instead of the generic pci_peek.. and pci_poke... functions to access the Comet and H100 resources.

The pciopen and pciopenex functions are fixed to check to device driver version for compatibility before attempting to use features that may not be supported by incompatible versions.

The dpdebug program is modified to have specific commands for reading and writing Comet and H.100 interface registers using the new library functions. The commands, rt and wt, read and write Comet registers. The commands, rh and wh, read and write H.100 interface registers.

The dpcons and dpdmastat programs are modified to run even if mismatched versions are detected. They will display a warning if versions don't match but will continue to run.

Added configuration of the MIPS Memory Management Unit (MMU) to allow the MIPS application to access memory on expansion smPCI modules.

Added framer mode options to configure the Comet to align the transmit multi-frame to the multi-frame of the TDM subsystem.

Commands are added to provide a new method for handling signalling data. This new method has the MIPS use tables in memory for incoming and outgoing signalling data which allows DSPs on smPCI modules to read and write the signalling data. The host application is responsible for enabling this signalling mode. For incoming signalling data the host application tells the MIPS where the tables are in memory. For outgoing signalling data the MIPS tells the host where the data should be stored and the host, in turn, provides the memory addresses to the DSPs.

The Host PCI Interface FPGA configuration includes the following changes:

• Minor bug fix in the arbiter for the MIPS processor bus.
• Modified reads of Comet and H.100 interface registers to access single bytes, thus avoiding timeout conditions.

The changes to the Comet and H.100 register accesses involve new address decodes and, therefore, changes to host code for accessing Comet and H.100 resources, as described above.

The Expansion FPGA configuration includes the following changes:

• Added a control register to synchronize the E1 or T1 transmit multi-frame to the multi-frame of the TDM subsystem.
• Fixed a bug that caused E1/T1 data to be shifted between the framers and the TDM subsystem after framer resynchronization.
• Enhancements to fix several bugs in bus arbitration and data transfers.

Important Note:

This note pertains to customers continuing to use earlier versions of the DPT software (prior to 1.3.0) and who receive new boards that must be flashed back to the older versions of the FPGA configurations and embedded code:

Due to the retry timeout code used by the host interface FPGA in version 1.3.0 or higher, older versions of the dpflashup are likely to encounter an error when attempting to run on boards that are configured with version 1.3.0 or higher of the host FPGA configuration. The error can leave the DPT board(s) inoperable.

In order to successfully revert new DPT boards to the older FPGA configurations the dptp12config program must be run before dpflashup. Run dptp12config as follows:

    dptp12config -f dpe1h8.bit dpt0

Repeat this program for all the boards that need to be re-flashed. Once this step is performed it is safe to run the dpflashup program normally.

In case the dpflashup program has already been attempted and has reported an error or otherwise failed to complete successfully, you may still recover by running the dptp12config program as long as the board has not been power-cycled and the system has not been rebooted.

The configure program has a new option to modify this default behavior. The option is:

    --with-readline=option

cac	- force the use if the readline library provided by CAC
disable	- disable the use of any readline library