DPT Software/Hardware Release Notes V1.5.6

DPT Software and Hardware Release Notes
Version 1.5.6

February 5, 2010

Overview

The following changes are introduced in this release:

Updates to the Linux device driver.
Modified source files to avoid compiler warnings and errors.
Updates to support and diagnostic programs.
New CPLD configuration for DPT5 and DPT6 boards.
Component versions for this release.
Known issues.

Notes:

This release includes a new CPLD configuration for DPT5 and DPT6 boards. Although not critical for properly functioning boards, they can be updated using the dpflashup program after the software update is installed.

Updates to the Linux Device Driver

The Linux device driver is updated for compatibility with recent changes in the Linux kernel.

Replace the use of the obsoleted kill_proc function with send_sig. The latter function is used for all kernel versions that include its prototype.
Declare the interrupt handler without the 3rd stack registers argument when appropriate.
Replaced the use of SA_SHIRQ macro with IRQF_SHARED in the call to request_irq() when appropriate.

The boot-time initialization script, cacdpt.sh, is fixed use the name of the device driver module instead of a shell variable which was never defined.

Modified Source Files to Avoid Compiler Warnings and Errors

Several changes to source files were made to satisfy warnings and avoid errors from recent versions of the GCC compiler - 4.4.x and some from 4.3.x. The changes include:

discontinue the use of the #ident directive,
no longer including the header file (which was not actually required in the first place)
fixed data types for variables whose addresses are cast as pointers to another type,
Inline function macros used in the Linux device driver are now qualified as static instead of extern.

Updates to Support and Diagnostic Programs

dpflashup

The dpserial program has new command line options to specify and update individual values for the burn hours (-B), PCB revision (-R) and serial number (-S). It is also modified to accept a full, 8-digit serial number that includes the board type prefix. These features are primarily used for board production and tests.

New CPLD Configuration for DPT5 and DPT6 Boards

The configuration for the CPLD device on DPT5 and DPT6 boards is updated to abort FPGA configuration after 4 attempts. This resolves a problem that can occur on new boards that have incorrect data on the FPGA configuration flash. This is not known to be an issue with boards that are already configuring properly.

Component Versions for This Release

The DPT software release includes several components of software, embedded code and hardware FPGA configurations. The major and minor version numbers are the same within each category. However the update version number of each component may vary depending on the number of changes and iterations each component has gone through between releases.

The components and their versions for DPT Software Release 1.5.6 are:

Software Components		Version
	API Library and Programs	1.5.6
	Linux Device Driver	1.5.6
	Solaris Device Driver	1.5.4
	Windows Device Driver	1.5.1
Embedded Code Components
	Embedded MIPS Loader	1.4.0
	Embedded MIPS Application	1.4.10
DPT4 Hardware Components
	PLD Configuration	1.4.0
	Host FPGA Configuration	1.4.5
	Expansion FPGA Configuration	1.4.1
DPT5 & DPT6 Hardware Components
	CPLD Configuration	1.5.5
	FPGA Configuration	1.5.10

Known Issues

The data buffers in the dual-port memory can overflow as channels are being started. The overflow can corrupt data for a channel whose buffer is using an adjacent area of the dual-port memory. The problem only occurs when a channel is being started and only occurs on DPT4 boards, not DPT5 or DPT6 boards.
A suitable work-around for applications that open all their channels at start-up is to wait for all channels to be opened and then flush receive channels before using received data.
Large amounts of channel data being written to the transmit buffers can saturate the board's local bus, preventing the MIPS processor from obtaining access to the board's local bus long enough to miss buffer interrupts. This has been known to cause corruption of transmitted data and timeout errors reported by the dpchantest diagnostic program. The problem mostly appears on fast systems that are capable of downloading data fast enough to cause the local bus to saturate.
The only work-around at this time is for applications to limit the rate at which they write data to transmit channels. The suggested limit is an aggregate download rate to approximately 24 Mbytes per second or, assuming all E1 channels are being used,
Switching to non-blocking I/O mode using the pci_chan_blocking function does not work in all cases for channels that are initially opened with blocking mode. The issue may be dependent on the host operating system as well as other factors. The pci_chan_blocking appears to be able to switch back and forth for channels opened initially with non-blocking mode.
On rare occasions, DPT5 and DPT6 boards have been known fail to complete a channel DMA transfer. To date, this issue has only been seen on some older desktop systems when multiple boards are running our burn-in tests. A method for detecting possible causes have been added to the FPGA and diagnostic programs.
Some DPT5 and DPT6 boards may fail to configure the host FPGA when the system is first powered on. This problem has been resolved with a modification to the board (DPT5 rev 0.6 or higher, DPT6 rev 0.4 or higher) and a CPLD configuration update (version 1.5.4 or higher). Contact CAC for updates to boards that exhibit this problem.
On rare occasions a DPT4 board can hang during the initialization process. This has only been known to occur when being initialized the first time following a power cycle.