October 28, 1998
Overview
Version 1.7.0 of the V6M6 host software and FPGA configurations includes the following changes:
Support for new DM12C549 DSP Modules
The user's manual for the DM12C549 is not yet available. Once it is completed it will be available at our on-line manual site.
The following diagnostics currently support DM12C549 modules: pcichip, pcimemory, and pcitdm. The pcimemslice diagnostic is aware of DM12C549 modules but they do not yet participate in the test. Other diagnostics will be modified to support the DM12C549 in the near future.
New SCSA Modes for IMSCSA Modules
To have the IMSCSA generate SREF-8K, add the macro SCSA_SREF_MASTER to the mode argument for the scsa_mode function. For example:
scsa_mode (scsa, SCSA_MASTER | SCSA_SREF_MASTER);
scsa_mode (scsa, SCSA_SLAVE | SCSA_SREF_MASTER);
In the first example the IMSCSA will be generating SCSA clock, sync and
the SREF-K.
The TDM subsystem should be configured to generate TDM clock which will be
used as the timing reference for the SCSA signals.
In the second example the IMSCSA will be generating SREF-8K while deriving
its timing from the SCSA clock and sync on the SCSA backplane.
The TDM subsystem should be configured so that TDM clock and sync come
from the IMSCSA module.
To have the IMSCSA synchronize to the SREF-8K signal from the backplane, add the macro SCSA_SREF_SLAVE to the mode argument for the scsa_mode function. This is only valid of the primary mode is SCSA_MASTER. For example:
scsa_mode (scsa, SCSA_MASTER | SCSA_SREF_SLAVE);
In this mode, the IMSCSA is the SCSA master, generating SCSA clock and
sync as well as the TDM clock and sync for its V6M6 baseboard.
The timing is derived from the SREF-8K signal.
In order to use this mode, the IMSCSA module must be revision 4 number stored in the module's EEROM. Revision 4 IMSCSA modules have a 14.087178 MHz crystal installed with a small capacitor across the crystal's leads to tune it to within 32 parts-per-million accuracy. Revision 3 IMSCSA modules have the crystal installed but must be upgraded with the additional tuning capacitor or a more accurate crystal.
The TDM subsystem should be configured to derive its clock from the IMSCSA module using the pci_tdm_timing function. For example:
int scsaclk = 8; /* 8.192 MHz SCSA and TDM clock */
int tdmframe = 128; /* 128 TDM slots per TDM frame */
PCI_MOD *scsa;
PCI_TDM *tdm;
scsa = pciopen ("pci0b");
tdm = pci_tdmopen ("pci0");
scsa_init (scsa, scsaclk);
scsa_mode (scsa, SCSA_MASTER | SCSA_SREF_SLAVE);
pci_tdm_timing (tdm, TDM_MODCLK(1), scsaclk, 8, -tdmframe, 16);
Note that if the IMSCSA revision is less than 4, scsa_mode will
return 0 with errno set to EINVAL.
New Diagnostic Program for IMATM Modules
Fixed Host Interrupt Map Function for DM4C51
New FPGA Configurations for PM4700A and PM5000 Modules