October 5, 2000
Overview
Version 2.1.1 of the V6M6 software and FPGA and CPLD configurations includes the following changes:
Fixed Problem Selecting TDM Clock Source for V6M6HS Boards
Modification to TDM Initialization Functions to Avoid IMHC4 PLL Problems
To avoid this from occurring, the pci_tdm_timing and pci_tdm_init library functions have been modified to set the clock divider on IMHC4 modules to its highest value before changing the TDM subsystem clock.
Due to the changes in the library functions application programs must be sure to set the IMHC4's clock divider to the correct value after calling either of those two functions. This is done by calling the imhc4_tdmclkdiv function with a PCI_MOD pointer for the IMHC4 module and a divider value of:
For example:
PCI_TDM *tdm = pci_tdmopen("pci0");
PCI_MOD *hc4 = pci_open("pci0c");
imhc4_init(hc4);
pci_tdm_timing(tdm, TDM_BASECLK, 2, 8, 32, 16);
imhc4_tdmclkdiv(hc4, 3);
In the case that the PLL does run out of control, the codecs will fail to complete their initialization and never clear the INIT status bit. The imhc4_init library function is modified to time out and return an error status with errno set to EIO if the codecs fail to complete their initialization. Previous versions of this function would wait indefinitely for the INIT status to clear.
The pciinit program is also modified to set the IMHC4's clock
divider when the module is initialized. The divider is set for a
2.048 MHz clock on V6M6 boards and for a 8.192 MHz clock on V6M6HS boards.
New Installation Directory for V6M6 Utility Programs
These programs are not normally installed by customers as they are primarily used for in-house serialization, and configuration of boards prior to shipment. However, they are included in the software distribution in case they are required.
Even if they had been compiled and used, it is not likely that they were installed to a directory outside of their source directory. In case they were installed at one time, please run the following commands to be sure that any old versions of these programs will be uninstalled:
cd $CAC/pci/pciutils
make clean
The only other software affected by this change is the pciburn
program which uses one of the utility programs to update burnin-time
information in the EEROMs.
The new version of pciburn includes a modification for the new
location of the utility.
Enhancements to the Solaris Initialization Script
CAC=/usr/cac
to replace /usr/cac with the appropriate directory name.
Other additions to this file include more samples of the chmod
command used to set access permissions for V6M6 devices and commented
example for using the new vme_misc_ctl program, described below.
New Support Program for Setting VME Bus Timeout on Force CPU-50 Boards
The CPU-50 board from Force Computers, among others, use the Tundra Universe II VME interface chip and the default VME bus timeout is 64 microseconds. We have not determined a way to control the value using configuration options for the VME device driver. However, we wrote a program using Force Computers' VME interface API to control the timeout value. The program must be run after any time the CPU is rebooted. We suggest running it from the V6M6 initialization script.
If you are using a Force CPU-50 and require a VME bus timeout of longer than 64 microseconds use the following steps to install the program.
cd $CAC/pci/pcisoldev
make vme_misc_ctl
$CAC/lib/vme_misc_ctl
This should report the current contents of the MISC_CTL register in the
VME interface and display the VME timeout represented by the setting.
if [ -x $CAC/lib/vme_misc_ctl ]; then
$CAC/lib/vme_misc_ctl -t512
fi
Edit the other sections of this file as appropriate for your system.
Note: you may also edit the installed copy of the initialization script if it is already installed in /etc/init.d/pciinit and skip the next step. The lines, above, may not be in that file and you will have to add them rather than simply uncommenting them.
make install-rc
This program will not work with CPU boards from other manufacturers. However, one other that we have tested, a Themis USP-IIi, had a default VME bus timeout of 1,024 microseconds which is plenty long.