February 2, 2005

Overview

Version 2.2.3 of the V6M6 software and FPGA and CPLD configurations includes the following changes:

• New FPGA configuration for DM4C6202 and DM4C6203 smPCI modules.

• Changes to Cronus boot code and RTEMS OS.

• Changes to the host API library for TDM subsystem control.

• Changes to utility and support programs.

• Changes to diagnostic programs.

New FPGA Configuration for DM4C6202 and DM4C6203 smPCI Modules

The TDM susbsystem interface for DM4C6202 and DM4C6203 modules has a new control code to source a TDM bus with all ones during a time slot.

A change is made to avoid glitches on the TDM multiframe signal that connects as an interrupt source to the DSPs.

Changes to Cronus Boot Code and RTEMS OS

The boot code for the Cronus processor is modified to fix the initialization of the P2CI hardware configuration register so that it does not overwrite the setting for the SDRAM refresh rate.

The RTEMS OS is updated to include changes in the V6M6HS board support library.

Changes to the Host API Library for TDM Subsystem Control

The pci_tdm_timing and pci_tdm_init library functions now return an error if the number of frames per superframe specified is 1.

Changes to the Utility and Support Programs

The pciint program is modified to change the sequence of module initialization. The Cronus resource needs to be initialized before some module types.

Changes to the Diagnostic Programs

The DSP program for the TDM diagnostic on DM4C6202 and DM4C6202 modules is modified to properly configure the MacBSP buses.