June 3, 2005
Overview
Version 2.2.4 of the V6M6 software and FPGA and CPLD configurations includes the following changes:
New FPGA Configurations for DM4C6202, DM4C6203 and PM5000 smPCI Modules
The timeout interval for PCI master transactions on PM5000 modules is increased from approximately 4 milliseconds to approximately 64 milliseconds. In addition, bugs are fixed to avoid premature timeouts and to make sure that the PCI master access is actually terminated when a timeout occurs.
These changes resolve problems that can occur during diagnostic tests that generate an unusually high amount of PCI bus activity.
Changes to the DM4C6202 and DM4C6203 Host API
Changes to the Utility and Support Programs Changes to Files Used for Building DM4C6202 and DM4C6203 Programs
The dm4c6202.h file in the pci/modsupport/dm4c6202 directory has a new PCI_BURST_CTRL macro used for control the burst/no-burst mode for PCI accesses from the modules.
Changes to the Diagnostic Programs
The DSP portion of the pcimemslice program for DM4C6202 and DM4C6203 modules, c62xslice.c, is modified to write the address and the compliment of the address for external memory tests and to NOT stop testing memory when a memory error is detected.
The c62xslice.c is also modified to allow the host application to control the setting of the BURST_CTRL register on the module. However, host programs that use this DSP program have not yet been updated to utilize this capability.