Release notes for CAC V6SSDL Software

Rev 1.5 - February 28, 2002

  - Release 0.4.10 of the V6SSDL FPGA configuration which includes:

     + Limited support for VME D8/D16 access
     + Input inhibit while running
     + Suspend* and Not-Ready* enables
     + Absolute snapshot dump
     + Improved memory size and selection control

  - Modified SunOS device driver probe routine to use long-word
    accesses.  This is now required since the board responds to
    short-word accesses.

Rev 1.4 - November 1, 2001

  - added packing implementation for "By5" configuration.
  - added dly_abs_dump function to library.
  - increased delay for FPGA configuration in the dly_fpga_config function.

Rev 1.3 - July 7, 2000

  - dly_memsize function

    The dly_memsize() function now specifies the memory size in megabytes
    instead of gigibytes.  Valid values are 128, 256, 512, 1024, 2048
    and 4096.


  - Snap Shot / VME dump

    The FPGA register macro, V6SSDL_DLCR has been deleted.

    New snapshot control register macros have been defined:

        Macro in dlyutil.h    Mnemonic in dly_fpga_reg_list

          V6SSDL_SSCR           snapctl
          V6SSDL_SSINI          snapini
          V6SSDL_SS_LEN         sslen
          V6SSDL_SS_START       snapstart
          V6SSDL_SS_END         snapend

    The dly_set_dump function's arguments have changed.  There are now 4
    arguments:

          DLY_DEV *dly    - the DLY_DEV structure pointer
          u_int    len    - number of 32-bit words of snapshot
          u_int    irq    - IRQ number for sync setting
          u_int    frz    - freeze-on-snap setting

    dly_set_dump does not initiate a dump.  New dly_start_dump function
    is added for that purpose.

    The dlydumptest diagnostic program is modified to use these new
    functions.

  - dlyflash program

    Options -s and -w were added to have the program show data in the
    flash.  The -s option specifies the "show" operation and -w followed
    by an integer value specifies how many words to display.  The other
    options to specify the flash address are valid for the "show" operation.

  - dlysetup program

    The program now accepts V6SSDL board device naames on the command line.
    It will setup all listed boards using the specified setup file.
    This should not be used with setup files that specify a32 information.

  - SunOS memory mapping

    The dly_open function and dlytest program are modified to account
    for the addresses returned by mmap on SunOS being aligned on page
    boundaries.  Addresses are offset to match the actual board addresses
    which may be within a page boundary.


Rev 1.2 - May 1, 2000

  - FPGA Configuration and Microcode

    The V6SSDL FPGA configuration distributed with this release
    is in $CAC/v6ssdl/flash/drive027_cfg.

    This FPGA configuration requires the new microde in the file,
    $CAC/v6ssdl/flash/pip027.hex, which should be loaded in the
    flash memory at address 0xfd000.

  - Memory Size Control

    Added dly_memsize() function to the library and "mem" command
    for dlysetup program.  These provide the means to tell the
    V6SSDL FPGA how much memory is installed: 2, 4, or 8 GB.

    Macros for the values passed to dly_memsize() are defined
    in dlyutil.h: V6SSDL_MEM_2GB, V6SSDL_MEM_4GB andV6SSDL_MEM_8GB

    The "mem" command for dlysetup accepts integer values, 2, 4, or 8.

    The FPGA register where this data is stored may be accessed using
    dlysetup using the reg keyword, "memsize".

  - Delay value setting

    Fixed the dly_delay_bytes() function to use the full 32 bit value
    passed as its delay_bytes argument.

    The setup file for dlysetup may now specify delay setting as a
    hexadecimal number, starting with 0x.

  - Flash operation and access

    Flash operation functions and the dly_fpga_config() function are
    fixed to leave flash in its "READ" state.  Perviously, it was possible
    to leave the flash in some other state locking the CPLD out of being
    able to read the flash to configure the FPGA.

    The dlysetup program now allows FPGA config section 2 to be specified
    with the "config" command.

  - FPGA register functions dly_fpga_read() and dly_fpga_write() now allow
    any register offsets between 0x00 and 0x40.

  - CPU type definition

    The conditionally compiled code in dly_dump.c now checks for
    FORCE_PCODE604 being defined.  This is passed in from the vxworks
    makefile, Makefile.dly in $CAC/vxworks.

    In Makefile.dly the macro, HOSTCPU, defines the macro to be defined
    for the compiler.  The setting of HOSTCPU should be changed for the
    CPU type of the target system before compiling the software for
    VxWorks.

  - Another new command for the dlysetup program is the "say" command.
    This simply provides the means of having a message displayed as the
    setup file is processed.

Rev 1.1 - April 5, 2000

  - Initial version